UPD441000LGW-B70X datasheet, PDF

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UPD441000LGW-B70X: DescriptionStandard SRAM, 128KX8, 70ns, CMOS, PDSO32, 0.525 INCH, PLASTIC, SOP-32; Categorystorage storage; File Size183KB，28 Pages; ManufacturerNEC Electronics

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UPD441000LGW-B70X Overview

Standard SRAM, 128KX8, 70ns, CMOS, PDSO32, 0.525 INCH, PLASTIC, SOP-32

UPD441000LGW-B70X Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	NEC Electronics
Parts packaging code	SOIC
package instruction	SOP,
Contacts	32
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	70 ns
JESD-30 code	R-PDSO-G32
JESD-609 code	e0
memory density	1048576 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	32
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-25 °C
organize	128KX8
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	2.95 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	OTHER
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	11.3 mm

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DATA SHEET

MOS INTEGRATED CIRCUIT

PD441000L-X

1M-BIT CMOS STATIC RAM

128K-WORD BY 8-BIT

EXTENDED TEMPERATURE OPERATION

Description

The

PD441000L-X is a high speed, low power, 1,048,576 bits (131,072 words by 8 bits) CMOS static RAM.

The

PD441000L-X has two chip enable pins (/CE1, CE2) to extend the capacity.

The

PD441000L-X is packed in 32-pin plastic SOP and 32-pin plastic TSOP (I) (8

13.4 mm) and (8

20 mm).

Features

•

131,072 words by 8 bits organization

•

Fast access time : 70, 85, 100, 120, 150 ns (MAX.)

•

Low voltage operation

(B version : V

= 2.7 to 3.6 V, C version : V

= 2.2 to 3.6 V, D version : V

= 1.8 to 3.6 V)

•

Low V

data retention

(B version : 2.0 V (MIN.), C version, D version : 1.5 V (MIN.))

•

Operating ambient temperature : T

= –25 to +85 °C

•

Output Enable input for easy application

•

Two Chip Enable inputs : /CE1, CE2

Part number

Access time

ns (MAX.)

Operating supply Operating ambient

voltage

temperature

°C

−25

to +85

At operating

mA (MAX.)

Supply current

At standby

At data retention

A (MAX.)

Note

PD441000L-BxxX

PD441000L-CxxX

PD441000L-DxxX

70, 85, 100

100, 120

120, 150

2.7 to 3.6

2.2 to 3.6

1.8 to 3.6

Note

0.5

A (T

≤

40 °C)

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all devices/types available in every country. Please check with local NEC representative for

availability and additional information.

Document No. M13714EJ5V0DSJ1 (5th edition)

Date Published December 2000 NS CP (K)

Printed in Japan

The mark

•

shows major revised points.

1998

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Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

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