DCR3220A65
Phase Control Thyristor
DS5933-4 April 2013 (LN30253)
FEATURES
Double Side Cooling
High Surge Capability
KEY PARAMETERS
V
DRM
I
T(AV)
I
TSM
dV/dt*
dI/dt
6500V
3310A
44200A
2000V/µs
200A/µs
APPLICATIONS
High Power Drives
High Voltage Power Supplies
Static Switches
*
Higher dV/dt selections available
VOLTAGE RATINGS
Part and
Ordering
Number
Repetitive Peak
Voltages
V
DRM
and V
RRM
V
6500
6000
5500
Conditions
DCR3220A65*
DCR3220A60
DCR3220A55
T
vj
= -40°C to 125°C,
I
DRM
= I
RRM
= 300mA,
V
DRM
, V
RRM
t
p
= 10ms,
V
DSM
& V
RSM
=
V
DRM
& V
RRM
+ 100V
respectively
Lower voltage grades available.
o
o
*6200V @ -40 C, 6500V @ 0 C
Outline type code: A
(See Package Details for further information)
ORDERING INFORMATION
When ordering, select the required part number
shown in the Voltage Ratings selection table.
For example:
DCR3220A65
Note: Please use the complete part number when ordering
and quote this number in any future correspondence
relating to your order.
Fig. 1 Package outline
1/10
www.dynexsemi.com
DCR3220A65
SEMICONDUCTOR
CURRENT RATINGS
T
case
= 60°C unless stated otherwise
Symbol
Double Side Cooled
I
T(AV)
I
T(RMS)
I
T
Parameter
Test Conditions
Max.
Units
Mean on-state current
RMS value
Continuous (direct) on-state current
Half wave resistive load
-
-
3220
5058
4655
A
A
A
SURGE RATINGS
Symbol
I
TSM
It
2
Parameter
Surge (non-repetitive) on-state current
I t for fusing
2
Test Conditions
10ms half sine, T
case
= 125°C
V
R
= 0
Max.
43.0
9.25
Units
kA
MA s
2
THERMAL AND MECHANICAL RATINGS
Symbol
R
th(j-c)
Parameter
Thermal resistance – junction to case
Test Conditions
Double side cooled
Single side cooled
DC
Anode DC
Cathode DC
R
th(c-h)
Thermal resistance – case to heatsink
Clamping force 83.0kN
(with mounting compound)
T
vj
T
stg
F
m
Virtual junction temperature
Storage temperature range
Clamping force
Blocking V
DRM
/ V
RRM
Double side
Single side
Min.
-
-
-
-
-
-
-55
74.0
Max.
0.00603
0.01024
0.01467
0.001
0.002
125
125
91.0
Units
°C/W
°C/W
°C/W
°C/W
°C/W
°C
°C
kN
2/10
www.dynexsemi.com
DCR3220A65
SEMICONDUCTOR
DYNAMIC CHARACTERISTICS
Symbol
I
RRM
/I
DRM
dV/dt
dI/dt
Parameter
Peak reverse and off-state current
Max. linear rate of rise of off-state voltage
Rate of rise of on-state current
Test Conditions
At V
RRM
/V
DRM
, T
case
= 125°C
To 67% V
DRM
, T
j
= 125°C, gate open
From 67% V
DRM
to 2x I
T(AV)
Gate source 30V, 10,
t
r
< 0.5µs, T
j
= 125°C
Repetitive 50Hz
Non-repetitive
Min.
-
-
-
-
Max.
300
2000
200
500
Units
mA
V/µs
A/µs
A/µs
V
T(TO)
Threshold voltage – Low level
Threshold voltage – High level
500 to 1900A at T
case
= 125°C
1900 to 6000A at T
case
= 125°C
500A to 1900A at T
case
= 125°C
1600A to 6000A at T
case
= 125°C
V
D
= 67% V
DRM
, gate source 30V, 10
t
r
= 0.5µs, T
j
= 25°C
-
-
-
-
-
1.01
1.08
0.3
0.2643
3
V
V
m
m
µs
r
T
On-state slope resistance – Low level
On-state slope resistance – High level
t
gd
Delay time
t
q
Turn-off time
I
T
= 3000A, T
j
= 125°C,
V
R
= 200V, dI/dt = 1A/µs,
dV
DR
/dt = 20V/µs linear
500
µs
Q
S
Stored charge
I
T
= 3000A, T
j
= 125°C, dI/dt – 1A/µs,
V
Rpeak
~3900V, V
R
~ 2600V
3830
6430
µC
I
RR
Reverse recovery current
45
60
A
I
L
Latching current
T
j
= 25°C, V
D
= 5V
-
3
A
I
H
Holding current
T
j
= 25°C, R
G-K
=
,
I
TM
= 500A, I
T
= 5A
-
300
mA
3/10
www.dynexsemi.com
DCR3220A65
SEMICONDUCTOR
GATE TRIGGER CHARACTERISTICS AND RATINGS
Symbol
V
GT
V
GD
I
GT
I
GD
Parameter
Gate trigger voltage
Gate non-trigger voltage
Gate trigger current
Gate non-trigger current
Test Conditions
V
DRM
= 5V, T
case
= 25°C
At 50% V
DRM,
T
case
= 125°C
V
DRM
= 5V, T
case
= 25°C
At 50% V
DRM,
T
case
= 125°C
Max.
1.5
0.4
400
10
Units
V
V
mA
mA
CURVES
8000
7000
Instantaneous on-state current,
T
I - (A)
6000
5000
4000
3000
2000
1000
0
0
1
2
3
4
Instantaneous on-state voltage, V
T
- (V)
min 125ºC
max 125ºC
min 25ºC
max 25ºC
Fig.2 Maximum & minimum on-state characteristics
V
TM
EQUATION
V
TM
= A + Bln (I
T
) + C.I
T
+D.I
T
A = -0.645429
B = 0.3001939
C = 0.000276
D = - 0.01259
these values are valid for T
j
= 125°C for I
T
500A to 6000A
Where
4/10
www.dynexsemi.com
DCR3220A65
SEMICONDUCTOR
Fig.3 On-state power dissipation – sine wave
Fig.4 Maximum permissible case temperature,
double side cooled – sine wave
Fig.5 Maximum permissible heatsink temperature,
double side cooled – sine wave
Fig.6 On-state power dissipation – rectangular wave
5/10
www.dynexsemi.com