08/25/94
15:00
11'9106680101
ANALOG DEVICES
~
002/005
--.
COMPUTER LABS
..'!
LIllI
ANALOG DEVICES
General
Deglitchers are normally used
to eliminate the non-linear effects
of "glitches" from the output of
D/A converters. The Computer
Labs DGM Series of Deglitchers
may be used with almost any type
of D/A converter to generate an out-
put signal with extremely high
spectral purity. These Deglitchers
have been used for television signal.
reproduction, CRT displays. wave-
form generation, and automatic test
equipment, to name a few.
DGM-1040 and -1080
OfA Deg litchers
OBS
The Problem
I
I
I
In most instances, fast-settling
DIA
converters are current-switch-
ing types, rather than voltage types.
In this type of converter, any input
bit changing causes a change in the
output current of the converter.
The input circuits for current-
switching 01A's, and their TTL or
DTL driving logic, are subject to
the characteristic of saturated logic
which causes propogation delay for
negative-going inputs to be dif-
ferent from the delay for positive-
going inputs.
As a result of this phenomenon,
time skew of the individual current
switches within the
D/A
converter
is worst when one or more input
bits are out of phase with th e others.
This is true even for ideal inputs in
which the digital input bits arrive
simultaneously; if there is time
skew among the bit inputs, the
problem becomes even more pro-
nounced.
These differences among the
internal switches cause a discon-
tinuity or "glitch" in the output
current of the D/A converter. The
true "worst case" glitch always
occurs at the switching point of the
Most Significant
Bit (MS8)
or the
center point of the output range,
because nearly equal and opposite
currents are being switched.
In addition to this inescapable
switching transient in the output,
OLE
TE
I
!
Featu res
!
.
.
.
.
.
15 nsee acquisition
0.01% linearity.
time.
Directly interfaces with ultra high-speed, current-output
D/A's.
TTL or ECl compatible.
DGM plus D/A costs less than any "degfitched"
O/A available,
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DGIo4 SERIES
8L.OCIO: D IAGRA.IoI
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08/25/94
15:01
'a'9106680101
ANALOG DEVICES
I4I
003/0~
most current-output
D/A converters
also
have a maximum
output voltage
limitation.
Part of this limitation may be
the result
of
high output capacit-
ance
and/or resistance; this
char-
acteristic can be "masked" in data
AC CHARACTERISTICS
DGM-1040
Acquisition Time
Sample Rate (max)
Sample Delay TTL
ECl
Droop Rate
Harmonic Distortion
Feedthru Rejection
Pedestal
Residual Glitch
Output Noise level
15 nsec
30 MHz
10 nsec
DGM-10aO
75 nsec
11 MHz
10
nsec
6 nsec
See Fig, 2&3
~
s~ Fig. 2
sheets
if
settling time is specified
with an impractically-low
imped-
ance load.
Even D/A converters
which
have
low
output
capacitance and/
or
resistance will have a maximum
output
voltage
limitation which is
established
by saturation
of the
internal switching transistors.
This internal
saturation,
in
turn, generally
precludes
operating
the current-switching
D/A con-
verter
as effectively in a unipolar
mode
as it can be operated in a bi-
polar
output
mode.
6
nsec
.
8 mY/usee
>60 dB
>60 dB
10 mV
30 mV
0.2 mV (AMS)
>60 dB
>70 dB
2 mV
$"" Fig. 1
20 mV
S""FiQ.1
0.1 mV (RMS)
,
mY/usee
OBS
NOTE;.: Addlt;o~al d.f.il. on 'ha cnar8ct~(i~'iC5 cf current-
,wltchi~!I. r85I...nli~g
O/A Con'~r!."
ore i~cl1Jded i~
"Nol.. on F""$ettll~g
D/A Co~.erters'.
which 8'. pan 01
Ih. oale Sneel on Ihe Compu'er lab. MDSfMDP $e,les
O/A'S.
DGM-1040 & DGM"1080
DC CHARACTERISTICS
Gain
Offset
.975
Adjustable to zero
100 ppm/oC
:1:0.01%
7.5 mA max
19 mA max
The Solution
When first exposed to the un-
desirable
effect
of
analog
dis-
continuities
in the outputs
of
cur-
rent-switching
D/A
converters,
many users erroneously
assume
two straight-forward
approaches
will solve the problem. At the in-
put, minimizing
time skew among
the data
bit
inputs will be a use-
OLE
TE
Offset Drift
Linearity
Current Source Current
Current Sink
Current
ANALOG INPUT CHARACTERISTICS
Input Voltage
Input Impedance
Input Bias
Current
i:2 V
1
megohm
0.05 nA
ANALOG OUTPUT CHARACTERISTICS
Output Voltage
(no
load)
Output
Current
Output Impedance
:1:2
V
:!:SO
mA
50
ohms
ful technique.
At the
output.
the
DEGLITCH STROBE CHARACTER ISTICS
Optionally either of the following:
TTL single line input
"0" = track
"1"
=
hold
ECL 2 line complementary
"0" = track
"1" = hold
0 to +0.4 V
2standard
TTlload!
use of a filter may also appear to be
a neat "solution" to the problem.
Unfortunately.
no
amount
of
time alignment
on the input bits
will overcome
the
physical
laws
associated
with the propogation
delays
of
saturated logic discussed
earlier.
In
addition, a filter designed
for eliminating
the "glitch" at the
major
carry
point
will not be
optimized
for transients
at other
points
of the
output,
nor will it
change the relationship
of
transient
amplitudes;
this is
because the
glitch
is a
function of signal dyna-
mics. AS a result, a multitude
of
intermodulation
products are form-
ed; some of these 1M products ap-
pear in the video
pass-band
as
spurious
signals,
and increased
+2.4 to +4 V
-1.7 V
-0.8
V
The.e inpu,,"a'e
".ch terminated
down ,a~l~tor to
.5.2 v.
wit"
a 330 ohm
pull-
POWER REQUIREMENTS
+15 V @ 100 mA w/o current source connected
-15 V @ 100mA w/o current
source
connected
+5 V @ 20 mA
TTl
input
option
-5.2 V @ 80 mA
-5.2 V @ 24 mA
}
ECl
input option.
PHYSICAL CHARACTERISTICS
Package
Size
Weight
Pins
Case
2.3" by 2.3" by 0.43"
58 mm by 58 mm by 11 mm
3 oz
~5 grams
0.040 diameter gold plated
diallyl phthalate per Mll-M-14
type SDG-F
noise
level.
Besides these considerations,
no amount
of
minimizing time
skew
08/25/94
15:01
'5"9106680101
ANALOG DEVICES
141
004/005
DGM
OUTPUT
WITH
f
PEDESTAL.
~OOP
DC
INPUT?
.-. .,
-1-
MOLD
OEGLITCH
~UA"
INPUT "0" TRACt(
1
I
-
--,----
GLITCH
DGM
FIG, I
OUTPUT
DC INPUT
OIl.
INPuT
~
CATA CHANGING DATA
ST~ADT
,
GLITCH PERIOD
~
DEGL.ITer
INPUT:L
J
~
-"-
1
FINAL SECOND VdLUE
OBS
ANAL.ex;
OUTI"IJT
OF DIA
INITIAL.
VAL.uE
ANI.LOG
OUT OF
DGM
INITIAL
VAL.UE
~
I
ACOUISTION
TIIoIE
1"/. OF fiNAL. VAL.uE
--
L
J
"I r
1
SAMPLE
DGM
DE:L.oI.Y
FIG,2
OUTPUT -
D/A
I',.
0.'
I",
~T ".,
AT 7~ .s
O.l~
:
~ 0.2
OLE
TE
INPUT
t
This
will hold
the area under the
value; the
curve
at a
constant
and/or
filtering the output will
overcome the output voltage limi-
tations imposed by internal
switch-
ing transistor saturation.
An optimum solution to the
problem of glitches would cause
the glitch to remain constant, re-
gardless of the transition
points
on the input data. As an example, it
should remain the same for the
transition
from a 000 000 001 to
1 000 000 000; as it is for the
transition
trom 1 000 000 000 to
1 000 000 001; or any other two
input words.
Ideally, an optimum solution
to the glitch problem would also
permit using the full current drive
capabilities ot the current-switch-
ing D/A converter in both bipolar
and unipolar modes ot operation.
The purpose of the Computer
Labs DGM modules is to reduce the
amplitude
of the glitch
to an accept-
able level, and more importantly, to
provide a constant-amplitude
glitch.
O.i
0.'
modules are not intended to get
rid of all glitches per se.
When the area under the trans-
ient curve is held constant, the fre-
quency spectrum
of the glitch is a
;i
a
~
DGN-IOeo
oCo T."e
3
fine line,
i.e..
at the sample
a single-line spectrum
rate frequencies. and
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is
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It
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01
0 O'
0.<
.. o:oe
0.07
o.o~
0.0'
0.0.
003
0.0l
O.OJ
0.00
0
00
Ol
8
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-'
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..
g
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73
100
TINt
(N"(,1
".
lOa
I'r.
20
.COUISIT,ON
FIG,
ACQUISITION
3
TI~E
V$.
Sli:TTUNG
ACCURACy
....
0"
.11
harmonics of the sample frequency.
The deglitcher circuits effect.
Ivery eliminate
the
intermodulation
products discussed earlier. When
they
do. the SIN ratio
approaches
that of an
ideally-quantized signal.
where
the rms noise is q/ v'l2.
when frequencies above
Nyquist
are
filtered out.
The DGM modules also
in-
corporate an internal adjustable
current sink. to adjust
the D/A out-
put
for
bipolar
operation.
In ad-
shifter
using
."
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,.
..
L.
fl
,
'0
~',~a.a.
,
'"
r.."". .
, ..au..
dition,
an internal
resistor
voltage
allows
. ..0';0"
consisting of a
current
source and
a precision
1
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.'.
oono. "c.
::
1 ,.
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the bipolar output
drive capabilities
of the DfA
converter
for
unipolar
positive applications.
These
fea-
tures
permit
OV to +2V unipolar
outputs.
An internal
buffer amplifier
buffers output
loading
from the
D/A module. permitting a constant
SO.ohm
output impedance.
Non,:
Ado."onoi
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08/25/94
15:02
'a'9106680101
ANALOG DEVICES
~
005/005
.~
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(I)
I-
ANALOG
OUTPUT
SO Okllll 0.1 V no-PI
LINE
14
11
21
O
DGM
BIPOLAR
14
OUTPUT
ia
c
MDS
CIA
-
OElIS
-
SO A
1040
22
...
....
CONvERTER
IS
OEGLITCH
MODULE
OFFSET
ADJUST
1000
-IS
V
v 0 IOP~[tTi
~I,4
V (P-PI
'
Co
:501\.
11
CLOCK
OBS
STROBE
..'
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-1
L
1:1 1'5
(MINI
I--
SETT\,ING TII.'E: . 20 NS
"'.!loX,UPDATE RATE - 30 MHl
DISTORTION < 0,1 '/,
L.!IoIiGE SIGNAL BANOWIDTHS
UP TO 15MI1Z
REF'N
..J
C(
Z
<liS
,REFOUT
,-",
-0
...
0
ai:>
..
t.4DSL-0825
OR
MDSL-
1035
OLE
TE
+v
4)0"-
ULTRA
FAST
OEGLITCHED
CIA
CONFIGURATION
ZI
O'rO+IV
15 OHIO! VUIE:O
LINE
SIGNAL
50 jl
24 J>.
Gl:N
<;>::
IOUT
!IV
ANA\,OG
SIGNAL
17
OGM-1040
20
7SJI.
'C;
~Q
...
...
0
CIA CONvERTER
,
DEGLITCH
MODUI..E
STROBE
OFFSET
.!IoDJUST
1000
A
1600AI
<p
~S J
11
-.J
L
45 /oIS
(MINI
~
I--
EDGE:
OF STROBE
SYNCHRONOUS
wITH
-v
t
OUTPUT: 0 TO +I VOLT INTO 1S JI.
SETTLING TIME'
20 NS
MAJ(. SAMPLE: !lA-TE' II
WHZ
DIFF,
GAIN
~4"1,
'881T51
~ 2 ":t. (9 BIT51
2 I % 110 BITS)
DII'I'. PHASE: 1: 2 eEG. <s BITS!
~ I DEG. (9 BITSI
~ 0.5 DEG. (10 BITS)
DATA UPOATE
I.£ADING
DEGLITCHEO
CIA
FO~
TELEVISION SIGNAL
REPRODUCTION
ORDERINGINFORMATION
DGM-1040 or DGM-1080 are
normally supplied with TTL "d~
glitch" input. For balanced ECl input, specify ECl Input on
P.O, or add suffix "ECl" to part
number.
,.. COMPUTER
LABS
ANALOG
DEVICES
COMPUTER LABS. A DIVISION OF ANALOG DEVICES
505 EDWARDIA DRIVE. GREENSBORO.
N.C. 27409
(919) 292-6427
TWX 510-922-7954
ANALOG DEViCeS.
ROUTE 1 INDUSTRIAL PARK. NORWOOD, MA 02062
(617) 329-4700
.
.
.
.
TWX 710-394-6577
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