BS62LV2008STCG55 datasheet, PDF

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BS62LV2008STCG55: DescriptionStandard SRAM, 256KX8, 55ns, CMOS, PDSO32, STSOP-32; Categorystorage storage; File Size316KB，9 Pages; ManufacturerBrilliance; Environmental Compliance

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BS62LV2008STCG55 Overview

Standard SRAM, 256KX8, 55ns, CMOS, PDSO32, STSOP-32

BS62LV2008STCG55 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Brilliance
package instruction	TSSOP, TSSOP32,.56,20
Reach Compliance Code	unknown
Maximum access time	55 ns
I/O type	COMMON
JESD-30 code	R-PDSO-G32
length	11.8 mm
memory density	2097152 bit
Memory IC Type	STANDARD SRAM
memory width	8
Humidity sensitivity level	3
Number of functions	1
Number of terminals	32
word count	262144 words
character code	256000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	256KX8
Output characteristics	3-STATE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Encapsulate equivalent code	TSSOP32,.56,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Parallel/Serial	PARALLEL
power supply	5 V
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum standby current	0.000001 A
Minimum standby current	1.5 V
Maximum slew rate	0.053 mA
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
width	8 mm

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BSI

FEATURES

Very Low Power/Voltage CMOS SRAM

256K X 8 bit

DESCRIPTION

BS62LV2008

• Vcc operation voltage : 4.5V ~ 5.5V

• Very low power consumption :

Vcc = 5.0V C-grade: 53mA (@55ns) operating current

I -grade: 55mA (@55ns) operating current

C-grade: 43mA (@70ns) operating current

I -grade: 45mA (@70ns) operating current

1.0uA(Typ.) CMOS standby current

• High speed access time :

-55

55ns

-70

70ns

• Automatic power down when chip is deselected

• Three state outputs and TTL compatible

• Fully static operation

• Data retention supply voltage as low as 1.5V

• Easy expansion with CE2, CE1, and OE options

The BS62LV2008 is a high performance, very low power CMOS

Static Random Access Memory organized as 262,144 words by 8 bits

and operates from a range of 4.5V to 5.5V supply voltage.

Advanced CMOS technology and circuit techniques provide both high

speed and low power features with a typical CMOS standby current of

1.0u

at 5.0

/25

and maximum access time of 55ns at 5.0

/ 85

Easy memory expansion is provided by an active LOW chip

enable (CE1), an active HIGH chip enable (CE2), and active LOW

output enable (OE) and three-state output drivers.

The BS62LV2008 has an automatic power down feature, reducing the

power consumption significantly when chip is deselected.

The BS62LV2008 is available in DICE form, JEDEC standard 32 pin

450mil Plastic SOP, 8mmx13.4mm STSOP and 8mmx20mm TSOP.

PRODUCT FAMILY

PRODUCT

FAMILY

BS62LV2008DC

BS62LV2008TC

BS62LV2008STC

BS62LV2008SC

BS62LV2008DI

BS62LV2008TI

BS62LV2008STI

BS62LV2016SI

OPERATING

TEMPERATURE

Vcc

RANGE

SPEED

( ns )

55ns: 4.5~5.5V

70ns: 4.5~5.5V

( I

CCSB1

, Max )

Vcc=5.0V

POWER DISSIPATION

STANDBY

Operating

( I

, Max )

Vcc=5.0V

55ns

70ns

PKG TYPE

DICE

TSOP-32

STSOP-32

SOP-32

DICE

TSOP-32

STSOP-32

SOP-32

+0 C to +70 C

4.5V ~5.5V

55/70

10uA

53mA

43mA

-40

C to +85

4.5V ~ 5.5V

55/70

30uA

55mA

45mA

PIN CONFIGURATIONS

BLOCK DIAGRAM

A10

CE1

DQ7

DQ6

DQ5

DQ4

DQ3

GND

DQ2

DQ1

DQ0

A13

A17

A15

A16

A14

A12

•

BS62LV2008TC

BS62LV2008STC

BS62LV2008TI

BS62LV2008STI

A17

A16

A14

A12

DQ0

DQ1

DQ2

GND

BS62LV2008SC

BS62LV2008SI

A11

A13

CE2

A15

VCC

A17

A16

A14

A12

Address

Input

Buffer

Row

Decoder

1024

Memory Array

1024 x 2048

2048

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

Data

Input

Buffer

Column I/O

Write Driver

Sense Amp

256

Column Decoder

Control

Address Input Buffer

VCC

A15

CE2

A13

A11

A10

CE1

DQ7

DQ6

DQ5

DQ4

DQ3

Brilliance Semiconductor, Inc

reserves the right to modify document contents without notice.

R0201-BS62LV2008

•

Data

Output

Buffer

CE1

CE2

Vdd

Gnd

A11 A9 A8 A3 A2 A1 A0 A10

Revision 1.1

Jan.

2004

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