ASM690A/692A and ASM802L/802M and ASM805L
μP
Power Supply Supervisor
With Battery Backup Switch
General Description
The ASM690A / ASM692A / ASM802L / ASM802M /
ASM805L offers complete single chip solutions for power
supply monitoring and control battery functions in
microprocessor systems. Each device implements four
functions: Reset control, watchdog monitoring, battery-
backup switching and powerfailure monitoring. In addition
to microprocessor reset under power-up and power-down
conditions, these devices provide battery-backup
switching to maintain control in power loss and brown-out
situations. Additional monitoring capabilities can provide
an early warning of unregulated power supply loss before
the voltage regulator drops out. The important features of
these four functions are:
1.6 second watchdog timer to keep microprocessor
responsive
4.40V or 4.65V VCC threshold for microprocessor
reset at power-up and power-down
SPDT (Single-pole, Double-throw) PMOS switch
connects backup power to RAM if VCC fails
1.25V threshold detector for power loss or general
purpose voltage monitoring
These features are pin-compatible with the industry
standard power-supply supervisors. Short-circuit and
thermal protection have also been added. The ASM690A
/ ASM802L / ASM805L generate a reset pulse when the
supply voltage drops below 4.65V and the ASM692A /
ASM802M generate a reset below 4.40V. The ASM802L /
ASM802M have power-fail accuracy to ±2%. The
ASM805L is the same as the ASM690A except that
RESET is provided instead of RESET.
No external components
Specified over full temperature range
Applications
Embedded control systems
Portable/Battery operated systems
Intelligent instruments
Wireless instruments
Wireless communication systems
PDAs and hand-held equipments
μP / μC power supply monitoring
Safety system
Typical Operating Circuit
Block Diagram
Features
Two precision supply-voltage monitor options
4.65V (ASM690A / ASM802L / ASM805L)
4.40V (ASM692A / ASM802M )
Battery-backup power switch on-chip
Watchdog timer: 1.6 second timeout
Power failure / low battery detection
Short circuit protection and thermal limiting
Small 8-pin SO and 8-pin PDIP packages
©2010 SCILLC. All rights reserved.
January 2010 – Rev. 2
Publication Order Number:
ASM690/D
ASM690A/692A and ASM802L/802M and ASM805L
Pin Configuration
Pin Description
Pin Number
ASM690A/
ASM692A
ASM802L/
ASM802M
Voltage supply for RAM. When V
CC
is above the reset threshold, V
OUT
connects to V
CC
through a P-Channel MOS device. If V
CC
falls below the
1
1
V
OUT
reset threshold, this output will be connected to the backup supply at V
BATT
(or V
CC
, whichever is higher) through the MOS switch to provide continuous
power to the CMOS RAM.
2
3
2
3
V
CC
GND
+5V power supply input.
Ground.
Power failure monitor input. PFI is connected to the internal power fail
4
4
PFI
comparator which is referenced to 1.25V. The power fail output (PFO) is
active LOW but remains HIGH if PFI is above 1.25V. If this feature is
unused, the PFI pin should be connected to GND or V
OUT
.
5
5
Power-fail output. PFO is active LOW whenever the PFI pin is less than
PFO
1.25V.
Watchdog input. The WDI input monitors microprocessor activity. An internal
timer is reset with each transition of the WDI input. If the WDI is held HIGH
6
6
WDI
or LOW for longer than the watchdog timeout period, typically 1.6 seconds,
RESET (or RESET) is asserted for the reset pulse width time, t
RS
, of
140ms, minimum.
Active-LOW reset output. When triggered by V
CC
falling below the reset
threshold or by watchdog timer timeout, RESET pulses low for the reset
7
-
pulse width t
RS
, typically 200ms. It will remain low if V
CC
is below the reset
RESET
threshold (4.65V in ASM690A / ASM802L and 4.4V in the ASM692A /
ASM802L) and remains low for 200ms after V
CC
rises above the reset
threshold.
-
8
7
8
RESET
V
BATT
Active-HIGH reset output. The inverse of RESET.
Auxiliary power or backup-battery input. V
BATT
should be connected to GND
if the function is not used. The input has about 40mV of hysteresis to
prevent rapid toggling between V
CC
and V
BATT
.
ASM805L
Name
Function
Rev. 2 | Page 2 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
Detailed Description
It is important to initialize a microprocessor to a known
state in response to specific events that could create
code execution errors and “lock-up”. The reset output of
these supervisory circuits send a reset pulse to the
microprocessor in response to power-up, power-
down/power-loss or a watchdog time-out.
RESET/RESET Timing
Power-up reset occurs when a rising V
CC
reaches the
reset threshold, V
RT
, forcing a reset condition in which
the reset output is asserted in the appropriate logic state
for the duration of t
RS
. The reset pulse width, t
RS
, is
typically around 200ms and is LOW for the ASM690A,
ASM692A, ASM802 and HIGH for the ASM805L.
Figure
1
shows the reset pin timing.
Power-loss or “brown-out” reset occurs when V
CC
dips
below the reset threshold resulting in a reset assertion for
the duration of t
RS
. The reset signal remains asserted as
long as V
CC
is between V
RT
and 1.1V, the lowest V
CC
for
which these devices can provide a guaranteed logic-low
output. To ensure logic inputs connected to the ASM690A
/ ASM692A/ASM802 RESET pin are in a known state
when V
CC
is under 1.1V, a 100kΩ pull-down resistor at
RESET is needed: the logic-high ASM805L will need a
pull-up resistor to V
CC
.
Watchdog Timer
A Watchdog time-out reset occurs when a logic “1” or
logic “0” is continuously applied to the WDI pin for more
than 1.6 seconds. After the duration of the reset interval,
the watchdog timer starts a new 1.6 second timing
interval; the microprocessor must service the watchdog
input by changing states or by floating the WDI pin before
this interval is finished. If the WDI pin is held either HIGH
or LOW, a reset pulse will be triggered every 1.8 seconds
(the 1.6 second timing interval plus the reset pulse width
tRS).
Application Information
Microprocessor Interface
The ASM690 has logic-LOW RESET output while the
ASM805 has an inverted logic-HIGH RESET output.
Microprocessors with bidirectional reset pins can pose a
problem when the supervisory circuit and the
microprocessor output pins attempt to go to opposite
logic states. The problem can be resolved by placing a
4.7kΩ resistor between the RESET output and the
microprocessor reset pin. This is shown in
Figure 2.
Since the series resistor limits drive capabilities, the reset
signal to other devices should be buffered.
Rev. 2 | Page 3 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
Watchdog Input
As discussed in the Reset section, the Watchdog input is
used to monitor microprocessor activity. It can be used to
insure that the microprocessor is in a continually
responsive state by requiring that the WDI pin be toggled
every second. If the WDI pin is not toggled within the 1.6
second window (minimum t
WD
+ t
RS
), a reset pulse will be
asserted to return the microprocessor to the initial start-
up state. Pulses as short as 50ns can be applied to the
WDI pin. If this feature is not used, the WDI pin should be
open circuited or the logic placed into a high-impedance
state to allow the pin to float.
Backup-Battery Switchover
A power loss can be made less severe if the system RAM
contents are preserved. This is achieved in the
ASM690/692/802/805 by switching from the failed V
CC
to
an alternate power source connected at V
BATT
when V
CC
is less than the reset threshold voltage (V
CC
< V
RT
), and
V
CC
is less than V
BATT
. The V
OUT
pin is normally
connected to V
CC
through a 2Ω PMOS switch but a
brown-out or loss of V
CC
will cause a switchover to V
BATT
by means of a 20Ω PMOS switch. Although both
conditions (V
CC
< V
RT
and V
CC
< V
BATT
) must occur for
the switchover to V
BATT
to occur, V
OUT
will be switched
back to V
CC
when V
CC
exceeds V
RT
irrespective of the
voltage at V
BATT
. It should be noted that an internal
device diode (D1 in
Figure 3)
will be forward biased if
V
BATT
exceeds V
CC
by more than a diode drop when V
CC
is switched to V
OUT
. Because of this it is recommended
that V
BATT
be no greater than V
RT
+0.6V.
Condition
V
CC
> Reset Threshold
V
CC
< Reset Threshold
V
CC
> V
BATT
V
CC
< Reset Threshold
V
CC
< V
BATT
SW1/SW2
Open
Open
Closed
SW3/SW4
Closed
Closed
Open
Table 1. Pin Connections in Battery Backup Mode
Pin
Connection
V
OUT
V
BATT
PFI
PFO
RESET
WDI
Connected to V
BATT
through internal
PMOS switch
Connected to V
OUT
Disabled
Logic-LOW
Logic-LOW (except on ASM805 where
it is HIGH)
Watchdog timer disabled
During the backup power mode, the internal circuitry of
the supervisory circuit draws power from the battery
supply. While V
CC
is still alive, the comparator circuits
remain alive and the current drawn by the device is
typically 35μA. When V
CC
drops more than 1.1V below
V
BATT
, the internal switchover comparator, the PFI
comparator and WDI comparator will shut off, reducing
the quiescent current drawn by the IC to less than 1μA.
Backup Power Sources - Batteries
Battery voltage selection is important to insure that the
battery does not discharge through the parasitic device
diode D1 (see
Figure 3)
when V
CC
is less than V
BATT
and
V
CC
>V
RT
.
ASM690A/802A/805L Reset Threshold = 4.65V
ASM692A /ASM802M Reset Threshold = 4.4V
Rev. 2 | Page 4 of 15 | www.onsemi.com
ASM690A/692A and ASM802L/802M and ASM805L
Table 2: Maximum Battery Voltages
Part Number
ASM690A
ASM802L
ASM805L
ASM692A
ASM802M
MAXIMUM Battery Voltage (V)
4.80
4.80
4.80
4.55
4.55
Although most batteries that meet the requirements of
Table 2
are acceptable, lithium batteries are very
effective backup source due to their high-energy density
and very low self-discharge rates.
Battery replacement while Powered
Batteries can be replaced even when the device is in a
powered state as long as V
CC
remains above the reset
threshold voltage V
RT
. In the ASM devices, a floating
V
BATT
pin will not cause a powersupply switchover as can
occur in some other supervisory circuits. If V
BATT
is not
used, the pin should be grounded.
Backup Power Sources - SuperCap™
Capacitor storage, with very high values of capacitance,
can be used as a back-up power source instead of
batteries. SuperCap
™
are capacitors with capacities in
the fractional farad range. A 0.1 farad SuperCap™ would
provide a useful backup power source. Like the battery
supply, it is important that the capacitor voltage remain
below the maximum voltages shown in
Table 2.
Although
the circuit of
Figure 4
shows the most simple way to
connect the SuperCap™, this circuit cannot insure that an
over voltage condition will not occur since the capacitor
will ultimately charge up to V
CC
. To insure that an over
voltage condition does not occur, the circuit of
Figure 5
is
preferred. In this circuit configuration, the diode-resistor
pair clamps the capacitor voltage at one diode drop below
V
CC
. V
CC
itself should be regulated within ±5% of 5V for
the ASM692A/802M or within ±10% of 5V for the
ASM690A/802L/805L to insure that the storage
capacitordoes not achieve an over voltage state.
Note: SuperCap
TM
is a trademark of Baknor Industries
Operation without a Backup Power Source
When operating without a back-up power source, the
V
BATT
pin should be connected to GND and V
OUT
should
be connected to V
CC
, since power source switchover will
not occur. Connecting V
OUT
to V
CC
eliminates the voltage
drop due to the ON-resistance of the PMOS switch.
Rev. 2 | Page 5 of 15 | www.onsemi.com
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