HELP CDMA Band Class 1
CDMA Power Amplifier Module
TM
AWC6341
Data Sheet - Rev 2.4
FEATURES
•
•
•
CDMA / EVDO Compliant
HELP
TM
technology
High Efficiency (RC-1 waveform):
•
37 % @ P
OUT
= +28.2 dBm
•
33 % @ P
OUT
= +17 dBm
•
•
•
Low Quiescent Current: 11 mA
Low Leakage Current in Shutdown Mode: <5
µA
Internal Voltage Regulator
AWC6341
•
Integrated “daisy chainable” directional coupler
with CPL
IN
and CPL
OUT
port
•
•
•
•
Internal DC blocks on RF IN/OUT ports
Optimized for a 50
Ω
System
1.8 V Control Logic
RoHS Compliant Package, 260
o
C MSL-3
M45 Package
10 Pin 3 mm x 3 mm x 1 mm
Surface Mount Module
APPLICATIONS
•
Band Class 1 and 14 CDMA/EVDO Wireless
Devices
The AWC6341 is a HELP
TM
product for CDMA devices
operating in Band Class 1 and Band Class 14. This
PA incorporates ANADIGICS’ HELPTM technology to
deliver exceptional efficiency at low power levels and
low quiescent current without the need for external
voltage regulators or converters. The device is
manufactured using advanced InGaP HBT technology
offering state-of-the-art reliability, temperature stability,
and ruggedness. Two selectable bias modes that
optimize efficiency for different output power levels and
a shutdown mode with low leakage current increase
handset talk and standby time. A “daisy chainable”
directional coupler is integrated in the module, thus
eliminating the need of an external coupler. The
self-contained 3 mm x 3 mm x 1 mm surface mount
package incorporates matching networks optimized for
output power, efficiency, and linearity in a 50 Ω system.
PRODUCT DESCRIPTION
GND at Slug (pad)
V
BATT
1
10
V
CC
RF
IN
2
CPL
9
RF
OUT
GND
3
Bias Control
Voltage Regulation
8
CPL
IN
V
MODE
4
7
GND
V
EN
5
6
CPL
OUT
Figure 1: Block Diagram
11/2012
AWC6341
V
BATT
1
10
9
V
CC
RF
IN
2
RF
OUT
GND
3
8
CPL
IN
V
MODE
4
7
GND
V
EN
5
Figure 2: Pinout (X-ray Top View)
6
CPL
OUT
Table 1: Pin Description
PIN
1
2
3
4
5
6
7
8
9
10
NAME
V
BATT
RF
IN
GND
V
MODE
V
EN
CPL
OUT
GND
CPL
IN
RF
OUT
V
CC
DESCRIPTION
Battery Voltage
RF Input
Ground
Mode Control Voltage
PA Enable Voltage
Coupler Output
Ground
Coupler Input
RF Output
Supply Voltage
2
Data Sheet - Rev 2.4
11/2012
AWC6341
ELECTRICAL CHARACTERISTICS
Table 2: Absolute Minimum and Maximum Ratings
PARAMETER
Supply Voltage (V
CC
)
Battery Voltage (V
BATT
)
Control Voltages (V
MODE
,V
EN
)
RF Input Power (P
IN
)
Storage Temperature (T
STG
)
MIN
0
0
0
-
-40
MAX
+5
+6
+3.5
+10
+150
UNIT
V
V
V
dBm
°C
Stresses in excess of the absolute ratings may cause permanent damage.
Functional operation is not implied under these conditions. Exposure
to absolute ratings for extended periods of time may adversely affect
reliability.
Table 3: Operating Ranges
PARAMETER
Operating Frequency (f)
Supply Voltage (V
CC
)
Enable Voltage (V
EN
)
Mode Control Voltage (V
MODE
)
CDMA Output Power
HPM
LPM
Case Temperature (T
C
)
MIN
1850
+3.1
+1.35
0
+1.35
0
27.4
-
-30
TYP
-
+3.4
+1.8
-
+1.8
-
28.2
17.0
-
MAX
1915
+4.35
+3.1
+0.5
+3.1
+0.5
-
-
+90
UNIT
MHz
V
V
V
P
OUT
< +28.2 dBm
PA "on"
PA "shut down"
Low Bias Mode
High Bias Mode
COMMENTS
dBm
°C
CDMA2000, RC-1
The device may be operated safely over these conditions; however, parametric performance is guaranteed only over
the conditions defined in the electrical specifications.
Notes:
(1)For Operation at 3.1 V, P
OUT
is derated by 0.8 dB
.
3
Data Sheet - Rev 2.4
11/2012
AWC6341
Table 4: Electrical Specifications - CDMA Operation (CDMA2000, RC-1)
(T
C
= +25 °C, V
BATT
= V
CC
= +3.4 V, V
ENABLE
= +1.8 V, 50
Ω
system)
PARAMETER
MIN
25
17
-
-
TYP
27.5
19.5
-50
-55
MAX
30.5
22
-46
-46
UNIT
COMMENTS
P
OUT
P
OUT
= +28.2 dBm
P
OUT
= +17 dBm
P
OUT
= +28.2 dBm
P
OUT
= +17 dBm
V
MODE
0V
1.8 V
0V
1.8 V
Gain
Adjacent Channel Power
at +1.25 MHz offset
Primary Channel BW - 1.23 MHz
Adjacent Channel BW = 30 kHz
Adjacent Channel Power
at +1.98 MHz
Primary Channel BW=1.23 MHz
Adjacent Channel BW=30 kHz
Efficiency
Quiescent Current (Icq)
Low Bias Mode
Mode Control Current
Enable Current
BATT Current
Leakage Current
dB
dBc
-
-
33
29
-
-
-
-
-
-
-
-
-
-
-
-
-
-56
-59
37
33
11
0.08
0.04
3.5
<5
-135
-135
-146
-44
-51
20
20
<0.25
-53
-53
-
-
15
0.15
0.1
5.5
10
-133
-
-
-35
-42
-
-
-
dBc
P
OUT
= +28.2 dBm
P
OUT
= +17 dBm
P
OUT
= +28.2 dBm
P
OUT
= +17 dBm
through V
CC
pin
0V
1.8 V
0V
1.8 V
1.8 V
%
mA
mA
mA
mA
µA
through V
MODE
pin, V
MODE
= +1.8 V
through V
EN
pin, V
EN
= +1.8 V
through V
BATT
pin, V
MODE
= +1.8 V
V
BATT
= +4.35 V, V
CC
= +4.35 V,
V
EN
= 0 V, V
MODE
= 0 V
Noise Power
Harmonics
2fo
3fo, 4fo
Coupling Factor
Directivity
Coupler In_Out
Daisy Chain Insertion Loss
Spurious Output Level
(all spurious outputs)
Load mismatch stress with no
permanent degradation or failure
1930 MHz to 1990 MHz
dBm/Hz GPS Band
ISM Band
dBc
dB
dB
dB
P
OUT
≤
+28.2 dBm
698 MHz to 2620 MHz
Pin 8 to 9, Shutdown Mode
P
OUT
≤
+28.2 dBm
In-band load VSWR < 5:1
Out-of-band load VSWR < 10:1
Applies over all operating ranges
Applies over full operating range
-
-
-70
dBc
8:1
-
-
VSWR
Notes:
(1)ACLR and Efficiency are measured at 1880 MHz.
4
Data Sheet - Rev 2.4
11/2012
AWC6341
APPLICATION INFORMATION
To ensure proper performance, refer to all related
Application Notes on the ANADIGICS web site:
http://www.anadigics.com
Shutdown Mode
The power amplifier may be placed in a shutdown
mode by applying logic low levels (see Operating
Ranges table) to the V
EN
and V
MODE
voltages.
Bias Modes
The power amplifier may be placed in either Low or
High Bias modes by applying the appropriate logic
level (see Operating Ranges table) to the V
MODE
pin.
The Bias Control table below lists the recommended
modes of operation for various applications.
Two operating modes are recommended to optimize
current consumption. High Bias/High Power operating
mode is for P
OUT
levels > 17 dBm. At about 17 dBm,
the PA could be switched to Low Power Mode.
Table 5: Bias Control
APPLICATION
Low power
High power
Shutdown
P
OUT
LEVELS
≤
+17 dBm
> +16 dBm
-
BIAS
MODE
Low
High
Shutdown
V
EN
+1.8 V
+1.8 V
0V
V
MODE
+1.8 V
0V
0V
V
CC
3.1 - 4.35 V
3.1 - 4.35 V
3.1 - 4.35 V
V
BATT
> 3.1 V
> 3.1 V
> 3.1 V
V
BATT
V
BATT
V
CC
C5
2.2
C5
µF
2.2 µF
0.1µF
C1
0.1µF
C1
1
2
3
GND at slug
1
GND at slug
V
BATT
RF
IN
RF
IN
2
V
BATT
V
CC
RF
OUT
CPL
IN
10
9
8
V
CC
10
9
C3
33pF
8
C2
V
CC
C3
33pF
C4
0.1µF
C2
0.1µF
C4
2.2µF ceramic
RF
OUT
2.2µF ceramic
RF
OUT
RF
IN
V
MODE
V
V
EN
EN
V
MODE
RF
IN
3
GND
4
V
EN
5
RF
OUT
CPL
IN
GND
4
5
V
MODE
V
MODE
GND
7
GND
6
6
V
EN
CPL
OUT
CPL
OUT
CPL
IN
7
CPL
IN
CPL
OUT
CPL
OUT
Figure 3: Evaluation Board Schematic
5
Data Sheet - Rev 2.4
11/2012
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