A4960
Automotive, Sensorless BLDC Controller
Features and Benefits
• 3-phase BLDC sensorless start-up and commutation
• Gate drive for N-channel MOSFETs
• Integrated PWM current limit
• 7 to 50 V supply voltage operating range
• Compatible with 3.3 V and 5 V logic
• Cross-conduction protection with adjustable dead time
• Charge pump for low supply voltage operation
• Extensive diagnostics output
• Low current sleep mode
Description
The A4960 is a three-phase, sensorless, brushless DC
(BLDC) motor controller for use with external N-channel
power MOSFETs and is specifically designed for automotive
applications.
The motor is driven using block commutation (trapezoidal
drive) where phase commutation is determined, without the
need for independent position sensors, by monitoring the motor
back-EMF. A programmable motor start-up scheme allows
the A4960 to be adjusted for a wide range of motor and load
combinations.
An external bootstrap capacitor is used to provide the above
battery supply voltage required for N-channel MOSFETs.
An automatic internal bootstrap charge management scheme
ensures that the bootstrap capacitor is always sufficiently
charged for safe operation of the power MOSFETs. The power
MOSFETs are protected from shoot-through by integrated
crossover control and adjustable dead time.
Integrated diagnostics provide indication of undervoltage,
overtemperature, and power bridge faults and can be configured
to protect the power MOSFETs under most short circuit
conditions. Detailed diagnostics are available as a serial data
word.
The A4960 is supplied in a 32-pin LQFP with exposed pad
for enhanced thermal dissipation (suffix JP). This package
is lead (Pb) free, with 100% matte-tin leadframe plating
(suffix –T).
Applications:
• Hydraulic pump
• Fuel pump
• Urea pump
• Blower fan
Package: 32-pin LQFP with exposed
thermal pad (suffix JP)
Not to scale
Typical Application
V
BAT
V
BAT
A8450
Regulator
SPI
3-Phase
BLDC
Motor
PWM
Micro-
controller
TACHO
RESET
FAULT
A4960
A4960-DS
A4960
Selection Guide
Part Number
Packing*
A4960KJPTR-T
1500 pieces per 13-in. reel
®
for additional packing options
*Contact Allegro
Automotive, Sensorless BLDC Controller
Absolute Maximum Ratings
1,2
Characteristic
Load Supply Voltage
Logic Supply Voltage
Terminal VREG
Terminal CP1
Terminal CP2
Symbol
V
BB
V
DD
V
REG
V
CP1
V
CP2
Terminals STRN, SCK, SDI, PWM
Logic Inputs
Logic Outputs
Terminal DIAG
Terminal VBRG
Terminals CA, CB, CC
Terminals GHA, GHB, GHC
Terminals SA, SB, SC
Terminals GLA, GLB, GLC
Terminal LSS
Terminal REF
Terminals CSP, CSM
Terminal AGND
Ambient Operating Temperature
Range
Maximum Continuous Junction
Temperature
Transient Junction Temperature
Storage Temperature Range
1
With
2
Small
Notes
Rating
–0.3 to 50
–0.3 to 6
–0.3 to 16
–0.3 to 16
V
CP1
– 0.3 to
V
REG
+ 0.3
–0.3 to 6
–0.3 to 6
–0.3 to V
DD
+ 0.3
–0.3 to V
DD
+ 0.3
–5 to 55
–0.3 to V
REG
+ 50
V
CX
– 16 to
V
CX
+ 0.3
V
CX
– 16 to
V
CX
+ 0.3
V
REG
– 16 to 18
V
REG
– 16 to 18
–0.3 to 6.5
–0.3 to 1
Unit
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
I
V
O
V
DIAG
V
BRG
V
Cx
V
GHx
V
Sx
V
GLx
V
LSS
V
REF
V
CSx
Terminal RESETN – can be pulled to V
BB
with
>22 kΩ
Terminals SDO, TACHO
Connect directly to GND
T
A
T
J
(max)
T
Jt
T
stg
Over temperature event not exceeding 10 s,
lifetime duration not exceeding 10 hours,
guaranteed by design characterization.
Temperature Range K; limited by power
dissipation
–40 to 150
150
175
–55 to 150
°C
°C
°C
°C
respect to GND. Ratings apply when no other circuit operating constraints are present.
“x” in pin names and symbols indicates a variable sequence character.
Thermal Characteristics
may require derating at maximum conditions, see application information
Characteristic
Package Thermal Resistance, Junction
to Ambient
Package Thermal Resistance, Junction
to Pad
Symbol
R
θJA
R
θJP
Test Conditions*
On 4-layer PCB based on JEDEC standard
On 2-layer PCB with 3 in.
2
copper each side
Value
23
44
2
Unit
ºC/W
ºC/W
ºC/W
*Additional thermal information available on the Allegro website
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2
A4960
Automotive, Sensorless BLDC Controller
Table of Contents
Specifications
Pin-out Diagram and Terminal List
Functional Block Diagram
Electrical Characteristics Table
Timing Diagrams
Operation Timing Diagrams
Functional Description
2
4
5
6
10
10
12
12
12
13
13
14
14
14
14
15
15
16
16
16
16
17
17
17
17
Functional Description
Input and Output Terminal Functions
Motor Drive System
Rotor position sensing using motor BEMF
Commutation Blank Time
BEMF Window
BEMF Hysteresis
Start-up
Motor control
Phase advance
Power Supplies
Gate Drives
Gate drive voltage regulation
Bootstrap charge management
Low-side gate drive
High-side gate drive
Dead Time
Sleep Mode and RESETN
Current Limit
Current sense amplifier
Fixed off-time
Blank time
Diagnostics
DIAG pin
Serial interface fault output
Fault response action
Fault Mask register
Chip-level diagnostics
Chip Fault States: Temperature Thresholds
Chip Fault State : VREG Undervoltage
Chip Fault State: VDD Undervoltage
Bootstrap Undervoltage Fault State
MOSFET fault detection
MOSFET fault blank time
Short fault operation
MOSFET Fault State: Short to Supply
MOSFET Fault State: Short to Ground
MOSFET Fault State: Shorted Winding
Serial Interface Description
Configuration and control registers
Diagnostic register
18
18
18
19
19
19
19
20
20
20
20
21
21
21
21
22
22
22
22
22
23
24
25
31
31
32
33
Applications Information
Control Timing Diagrams
Input/Output Structures
Package Outline Drawing
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
3
A4960
Automotive, Sensorless BLDC Controller
Pin-out Diagram
AGND
VBB
VERG
GND
CP1
CP2
CA
26
32
31
30
29
28
27
VBRG
RESETN
REF
VDD
DIAG
PWM
TACHO
SDO
25
SA
1
2
3
4
5
6
7
8
10
11
12
13
14
15
16
9
24
23
22
GHA
GLA
CB
SB
GHB
GLB
GHC
CC
PAD
21
20
19
18
17
SCK
SDI
CSM
CSP
LSS
Terminal List Table
Name
AGND
CA
CB
CC
CP1
CP2
CSM
CSP
DIAG
GHA
GHB
GHC
GLA
GLB
GLC
GND
Number
31
26
22
17
29
28
12
13
5
24
20
18
23
19
15
30
Function
Reference ground
Bootstrap capacitor, Phase A
Bootstrap capacitor, Phase B
Bootstrap capacitor, Phase C
Pump capacitor
Pump capacitor
Sense amplifier negative input
Sense amplifier positive input
Programmable diagnostic output
High-side gate drive, Phase A
High-side gate drive, Phase B
High-side gate drive, Phase C
Low-side gate drive, Phase A
Low-side gate drive, Phase B
Low-side gate drive, Phase C
Power ground
Name
LSS
PAD
PWM
REF
RESETN
SA
SB
SC
SCK
SDI
SDO
STRN
TACHO
VBB
VBRG
VDD
VREG
Number
14
–
6
3
2
25
21
16
9
10
8
11
7
32
1
4
27
Function
Low-side source
Exposed thermal pad
PWM Input
Reference voltage input
Standby mode control
Motor connection, Phase A
Motor connection, Phase B
Motor connection, Phase C
Serial clock input
Serial data input
Serial data output
Serial Strobe (chip select) input
Speed output
Main power supply
High-side drain voltage sense
Logic supply
Regulated voltage, above supply
STRN
GLC
SC
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
4
A4960
Automotive, Sensorless BLDC Controller
Functional Block Diagram
C
P
VDD
STRN
SCK
SDI
SDO
REF
CP1
CP2
VBB
Battery +
Serial
Interface
Start
Registers
Config
Registers
Charge
Pump
Regulator
VREG
VBAT
C
REG
Ref
DAC
Start
Sequencer
Phase A shown
(Repeated for B and C)
VBRG
PWM
CA
Bootstrap
Monitor
C
BOOTA
High-Side
Drive
VDS
Monitor
GHA
R
GATE
TACHO
SA
RESETN
Run
Control
Motor
State
Sequencer
Bridge
Control
Gate
Drive
Control
VREG
VDS
Monitor
Low-Side
Drive
Diagnostics
and
Protection
GLA
R
GATE
Phase C
Phase B
DIAG
Comm
Timer
Blank
Time
Dead
Time
Blank
Time
LSS
CSP
CSM
V
RI
Zero X
Detect
AGND
GND
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
5
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