Above ratings are based on the thermal resistances using a multi-layer circuit board (EIA/JESD51). For mounting on a mono-layer board, power derating shall be
needed. Please inquire of us about conditions.
*2）Total power consumption of all elements should not exceed the package power rating.
●
抵抗ネットワーク Resistor Networks
端子数
Number
of Pins
抵抗温度係数
T.C.R.
（×10
−6
/K）
T :±10
E :±25
C:±50
H:±100
T :±10
E :±25
C:±50
H:±100
T :±10
E :±25
C:±50
H:±100
抵抗温度係数
T.C.R.
（×10
−6
/K）
E :±25
C:±50
H:±100
E :±25
C:±50
H:±100
T :±10
E :±25
C:±50
H:±100
抵抗値範囲および絶対許容差
Resistance Range
（Ω）
E24 and Absolute Tolerance
B:±0.1% C:±0.25% D:±0.5% F :±1% G:±2%, J :±5%
510∼100k
100∼510k
51∼1M
51∼1M
30∼1M
10∼1M
510∼100k
510∼100k
100∼100k
51∼200k
51∼200k
30∼200k 10∼200k
1k∼30k
100∼100k
510∼30k
51∼200k
51∼200k
30∼200k 10∼200k
抵抗値範囲および絶対許容差
Resistance Range
（Ω）
E24 and Resistance Tolerance
B:±0.1% C:±0.25% D:±0.5% F :±1% G:±2%, J :±5%
―
―
―
―
R1＝
.
150∼10k
100∼40k
―
―
―
1k∼40k
100∼150k
1k∼150k
51∼200k
51∼50k
R1 : R2＝1 : 1∼1 : 4
R1 : R2＝1 : 1∼1 : 2
パッケージ内トータル抵抗値最大50kΩ
Max. total resistance in a package 50kΩ
R1 : R2＝1 : 1∼1 : 10
パッケージ内トータル抵抗値最大200kΩ
Max. total resistance in a package 200kΩ
相対抵抗値許容差
（オプション）
最小0.05％
相対T.C.R.
（オプション）
最小5×10
−6
/K
Relative Resistance Tolerance (Optional)
Minimum 0.05％
Relative T.C.R. (Optional)
Minimum 5×10
−6
/K
回路記号
Circuit Code
8, 14, 16
RIA
20, 24
RBA
RBB
8, 14, 16,
20, 24
回路記号
Circuit Code
端子数
Number
of Pins
16, 20
RDA
RTX
3
RTY
3
100∼150k
51∼200k
30∼200k
●
抵抗コンデンサネットワーク Resistor/Capacitor Networks
回路記号
Circuit Code
ACA
ACB
ACC
TFA, LFA
抵抗値範囲
Resistance Range
（Ω）
E12
抵抗値許容差
Resistance
Tolerance
静電容量範囲 Capacitance Range（pF）E12
TSSOP, QSOP
SOIC-N, W
T16, Q16
T20, Q20
T24, Q24
N08,N16,W16,W20
22∼120
22∼100
22∼150
22∼220
22∼220
22∼180
22∼120
22∼220
22∼220
静電容量許容差
Capacitance
Tolerance
22∼150
M:±20%
M:±20%
回路、パッケージによっては更に高い抵抗値、静電容量も可½です。 Depending on the circuit and package, much higher resistances and capacitances are possible.
カスタム品
（回路）
についてはお問い合わせ下さい。 Please inquire of us about your custom devices and circuits.
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