Ordering number : ENA2127
Thick-Film Hybrid IC
STK621-033N-E
Overview
3-phase Inverter Motor Drive
Inverter Hybrid IC
This IC is a 3-phase inverter power hybrid IC containing power elements (IGBT and FRD), pre-driver, as well as
protection circuit in one package.
Application
•
3-phase inverter motor drive
Features
•
Integrates power elements (IGBT and FRD), pre-driver, and protective circuit.
•
Protective circuits including overcurrent (bus line), pre-drive low voltage protection are built in.
•
Direct input of CMOS level control signals without an insulating circuit (photocoupler, etc) is possible.
•
Built-in simultaneous upper/lower ON prevention circuit to prevent arm shorting through simultaneous ON input for
the upper and lower side transistors.
(Dead time is required for preventing shorting due to switching delay.)
•
The level of the overcurrent protection current is programmable with the external resistance RSD between the ISD and
VSS terminals. (It is necessary to connect RSD to ensure normal operation of the overcurrent protection function.
ISD = 21A to 28A when RSD = 0Ω)
•
SIP (The single in-line package) of the transfer full mold structure.
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment. The products mentioned herein
shall not be intended for use for any "special application" (medical equipment whose purpose is to sustain life,
aerospace instrument, nuclear control device, burning appliances, transportation machine, traffic signal system,
safety equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives
in case of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any
guarantee thereof. If you should intend to use our products for new introduction or other application different
from current conditions on the usage of automotive device, communication device, office equipment, industrial
equipment etc. , please consult with us about usage condition (temperature, operation time etc.) prior to the
intended use. If there is no consultation or inquiry before the intended use, our customer shall be solely
responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer
'
s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer
'
s products or
equipment.
O0312HKPC 013-11-0009 No.A2127-1/8
STK621-033N-E
Specifications
Absolute Maximum Ratings
at Tc = 25°C
Parameter
Supply voltage
Collector-emitter voltage
Output current
Output peak current
Pre-driver supply voltage
Input signal voltage
FAULT terminal voltage
Maximum loss
Junction temperature
Storage temperature
Operating temperature
Tightening torque
Withstand voltage
Vis
Symbol
VCC
VCE
IO
Iop
VD1, 2, 3, 4
VIN
VFAULT
Pd
Tj
Tstg
TC
H-IC case temperature
A screw part at use M3 type screw *3
50Hz sine wave AC 1 minute *4
+ -
−,
surge
<
500V *1
+ - U (V, W) or U (V, W) -
−
+,
−,
U, V, W terminal current
+,
−,
U, V, W terminal current PW = 100μs
VB1 - U, VB2 - V, VB3 - W, VDD - VSS *2
HIN1, 2, 3, LIN1, 2, 3 terminal
FAULT terminal
Per 1 channel
IGBT, FRD junction temperature
Conditions
Ratings
450
600
±15
±30
20
0 to 7
20
24
150
-40 to +125
-20 to +100
1.0
2000
unit
V
V
A
A
V
V
V
W
°C
°C
°C
N•m
VRMS
In the case without the instruction, the voltage standard is - terminal = VSS terminal voltage.
*1 Surge voltage developed by the switching operation due to the wiring inductance between the + and – terminals.
*2 VD1 = between VB1-U, VD2 = VB2-V, VD3 = VB3-W, VB4 = VDD-VSS, terminal voltage.
*3 Flatness of the heat-sink should be lower than 0.15mm.
*4 The test condition is AC 2500V, 1 second.
Electrical Characteristics
at Tc=25°C, VD=15V
Test
Parameter
Power output part
Collector-to-emitter cut-off current
Collector-to-emitter saturation voltage
ICE
VCE (SAT)
VCE = 600V
IO = 15A
Upper side
Lower side
Diode forward voltage
VF
θj-c
(T)
θj-c
(D)
Control (Pre-driver) part
Pre-drive power supply consumption
electric current
Input ON voltage
Input OFF voltage
Protection part
Over-current protection electric current
Pre-drive low voltage protection
Fault terminal input electric current
Fault clearness delay time
ISD
UVLO
IOSD
FLTCLR
VFault = 0.1V
After each protection
operation ending
18
PW = 100μs, RDS = 0Ω
Fig.5
21
10
2.0
80
28
12
A
V
mA
ms
VIH
VIL
ID
VD1, 2, 3 = 15V
VD4 = 15V
Output ON
Output OFF
3.0
Fig.4
0.07
3.5
0.4
7
0.8
mA
V
V
IO = -15A
Upper side
Lower side
Junction-to-substrate thermal resistance
IGBT
FWD
Fig.3
Fig.2
Fig.1
2.2
2.6
1.9
2.2
0.5
2.9
3.3
2.7
3.0
5.0
7.3
mA
V
V
V
V
°C/W
°C/W
Symbol
Conditions
Circuit
min
Ratings
typ
max
unit
Switching time
tON
tOFF
IO = 15A, Inductive load
0.7
Fig.6
1.2
0.45
μs
μs
V
Electric current output signal level
ISO
IO = 15A
In the case without the instruction, the voltage standard is - terminal = VSS terminal voltage.
No.A2127-2/8
STK621-033N-E
Notes
1. Input ON voltage indicates a value to turn on output stage IGBT.
Input OFF voltage indicates a value to turn off output stage IGBT.
At the time of output ON, set the input signal voltage 0V to VIH (MAX).
At the time of output OFF, set the input signal voltage VIL (MIN) to 5V.
2. When the internal protection circuit operates, there is a Fault signal ON (When the Fault terminal is low level, Fault
signal is ON state : output form is open DRAIN) but the Fault signal doesn't latch.
After protection operation ends, it returns automatically within about 18ms to 80ms and resumes operation beginning
condition. So, after Fault signal detection, set OFF (HIGH) to all input signals at once.
However, the operation of pre-drive power supply low voltage protection (UVLO: it has a hysteresis about 0.3V) is
as follows.
Upper side
→
There is no Fault signal output, but it does a corresponding gate signal OFF.
Incidentally, it returns to the regular operation when recovering to the normal voltage, but the latch
continues among input signal ON (LOW).
Lower side
→
It outputs Fault signal with gate signal OFF.
However, it is different from the protection operation of upper side, it is automatically resets about
18ms to 80ms later and resumes operation beginning condition when recovering to normal voltage.
(The protection operation doesn't latch by the input signal.)
3. When assembling the hybrid IC on the heat sink with M3 type screw, tightening torque range is 0.8N•m to 1.0N•m.
Flatness of the heat-sink should be lower than 0.15mm.
4. The pre-drive low voltage protection is the feature to protect a device when the pre-driver supply voltage declines
with the operating malfunction. As for the pre-driver supply voltage decline in case of operation beginning, and so on,
we request confirmation in the set.
Package Dimensions
unit:mm (typ)
56.0
5.0
0.5
2.0
2.0
22 2.0=44.0
46.2
0.6
3.2
6.7
50.0
62.0
2.0
5.0
0.5
1
23
(10.9)
2.5
21.8
R1.7
3.4
No.A2127-3/8
STK621-033N-E
Internal Equivalent Circuit Diagram
VB1(7)
U(8)
VB2(4)
V(5)
VB3(1)
W(2)
U.V.
+(10)
U.V.
U.V.
Shunt Resistor
-(12)
Level
Shifter
HIN1(13)
HIN2(14)
HIN3(15)
Logic
LIN1(16)
LIN2(17)
LIN3(18)
FAULT(19)
ISO(20)
Latch
VDD(21)
Over-Current
VSS(22)
ISD(23)
Level
Shifter
Level
Shifter
Logic
Logic
Latch time about 18ms to 80ms
(Automatic reset)
VDD-Under Voltage
No.A2127-4/8
STK621-033N-E
Test Circuit
(The tested phase : U+ shows the upper side of the U phase and U- shows the lower side of the U phase.)
Fig 1: ICE
U+
M
N
10
8
V+
10
5
W+
10
2
U-
8
12
V-
5
12
W-
2
12
VD1=15V
7
8
ICE
M
A
VD2=15V
4
5
VCE
VD3=15V
1
2
VD4=15V
21
22
N
Fig 2: VCE(SAT)
U+
M
N
m
10
8
13
V+
10
5
14
W+
10
2
15
U-
8
12
16
V-
5
12
17
W-
2
12
18
VD1=15V
7
8
M
VD2=15V
4
5
IO
VCE(SAT)
VD3=15V
1
2
V
VD4=15V
21
m
22
N
23
Fig 3: VF
U+
M
N
10
8
V+
10
5
W+
10
2
U-
8
12
V-
5
12
W-
2
12
M
V
VF
IO
N
Fig 4: ID
ID
VD1
m
n
7
8
VD2
4
5
VD3
1
2
VD4
21
22
A
VD*
m
n
No.A2127-5/8
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