Freescale Semiconductor
Data Sheet: Advance Information
Document Number: PXD20
Rev. 2, 04/2012
PXD20
416 TEPBGA
27 mm x 27 mm
208 LQFP
28 mm x 28 mm
PXD20 Microcontroller Data
Sheet
The PXD20 represents a new generation of 32-bit
microcontrollers targeting single-chip industrial HMI
applications. PXD20 devices are part of the PX family of
Power Architecture
®
-based devices. This family has been
designed with an emphasis on providing cost-effective and
high quality graphics capabilities.
PXD20 devices contain 2 MB internal flash memory. Serial
flash memory and DRAM interfaces are provided to allow
even greater system flexibility.
The PXD20:
•
•
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Includes 2 MB internal flash memory, 1 MB internal
graphics SRAM, and 64 KB system SRAM
Offers high processing performance operating at
speeds up to 125 MHz
Is optimized for low power consumption
1
176 LQFP
24 mm x 24 mm
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.1 Device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2 Block diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Feature list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.4 Feature details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Pinout and signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . 24
2.1 176 LQFP package pinout . . . . . . . . . . . . . . . . . . . . . . 24
2.2 208 LQFP package pinout . . . . . . . . . . . . . . . . . . . . . . 25
2.3 416 TEPBGA package pinout–40 to 105°C . . . . . . . . . 26
2.4 Signal description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
System design information. . . . . . . . . . . . . . . . . . . . . . . . . . . 60
3.1 Power-up sequencing . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Electrical characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
4.1 Introduction. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
4.2 Parameter classification . . . . . . . . . . . . . . . . . . . . . . . . 62
4.3 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . 63
4.4 Recommended operating conditions . . . . . . . . . . . . . . 64
4.5 Thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . 66
4.6 EMI (electromagnetic interference) characteristics . . . 70
4.7 Power management . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
4.8 DC electrical specifications . . . . . . . . . . . . . . . . . . . . . 75
4.9 RESET electrical characteristics . . . . . . . . . . . . . . . . . 84
4.10 Fast external crystal oscillator (4–16 MHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
4.11 Slow external crystal oscillator (32 KHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
4.12 FMPLL electrical characteristics. . . . . . . . . . . . . . . . . . 88
4.13 Fast internal RC oscillator (16 MHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
4.14 Slow internal RC oscillator (128 kHz) electrical
characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
4.15 Flash memory electrical characteristics . . . . . . . . . . . . 90
4.16 ADC parameters. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
4.17 AC specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
4.18 AC timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129
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The PXD20 is designed to reduce development and
production costs of TFT-based displays by providing a
single-chip solution with the processing and storage capacity
to host and execute real-time application software and drive
TFT displays directly.
The PXD20 features a 2D OpenVG 1.1 graphics accelerator,
Video Input Unit (VIU2) and two on-chip display control
units (DCU3 and DCULite) designed to drive two color TFT
displays simultaneously. The PXD20 includes a enhanced
QuadSPI serial flash controller and an optional DRAM
controller allowing graphics RAM expansion externally.
The PXD20 is compatible with the existing development
infrastructure of current Power Architecture devices and are
supported with software drivers, operating systems and
configuration code to assist with application development.
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This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2011–2012. All rights reserved.
Preliminary—Subject to Change Without Notice
Overview
1
1.1
Overview
Device comparison
Table 1. PXD20 Family Feature Set
Feature
PXD20
176 LQFP
208 LQFP
e200z4d
4 KB Instruction-Cache
16-entry Memory Management Unit (MMU)
Floating Point Unit (FPU)
Signal Processing Extension (SPE)
Static–125 MHz
2 MB
64 KB
1 MB
16 entry
16 channels
No
Yes (OpenVG 1.1)
Yes
No
No
Yes
Yes
4 motors
Yes
Yes
Yes
Yes
8 ch, 32-bit
Yes
4 ch, 32-bit
20 ch, 16-bit: IC / OC / OPWM
8 ch, 16-bit: IC / OC
4 ch, 16-bit: IC / OC / OPWM / QDEC
6 motors
Yes
Yes
Yes
416 MAPBGA
Package
CPU
Execution speed
Flash memory (ECC)
RAM (ECC)
On-chip graphics RAM (no ECC)
MPU
eDMA
DRAM controller
OpenVG Graphics Accelerator
(GFX2D)
Display Control Unit (DCU3)
Display Control Unit Lite (DCULite)
Timing Controller (TCON) and RSDS
interface
Video Input Unit (VIU2)
QuadSPI serial flash interface
Stepper Motor Controller (SMC)
Stepper Stall Detect (SSD)
Sound Generator Module (SGM)
32 kHz external crystal oscillator
Real Time Counter and Autonomous
Periodic Interrupt (RTC/API)
Periodic interrupt timer (PIT)
Software Watchdog Timer (SWT)
System Timer Module (STM)
Timed I/O
PXD20 Microcontroller Data Sheet, Rev. 2
2
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
Overview
Table 1. PXD20 Family Feature Set (continued)
Feature
Package
Analog-to-Digital Converter (ADC)
CAN (64 mailboxes)
CAN sampler
Serial communication interface
SPI
I
2
C
GPIO
Debug
128
Nexus Class 3 (4MDO)
3 × LIN
2 × SPI
4
150
177
Nexus Class 3 (12MDO)
176 LQFP
16 channels, 10-bit
3 × CAN
Yes
4 × LIN
3 × SPI
PXD20
208 LQFP
416 MAPBGA
20 channels, 10-bit
PXD20 Microcontroller Data Sheet, Rev. 2
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
3
Overview
1.2
Block diagram
PXD20 Block Diagram
System
VREG
Oscillator
FMPLL x 2
RTC/32 kHz
Oscillator
Interrupt
Controller
16-ch DMA
MMU
Debug
JTAG
Nexus
Class 3+
e200z4d Core
(4 KB I-Cache)
Z160
2D
GFX
VIU2
DCU
Lite
DCU
TCON
RSDS
Crossbar Masters
Crossbar Switch (XBAR)
Memory Protection Unit (MPU)
PIT
SWT
STM
Boot
Assist
Module
(BAM)
2 MB
Flash
ECC
64 KB
SRAM
1 MB
Graphics
SRAM
PBRIDGE
RLE
Decode
Quad
SPI V02
DRAM
Interface
Crossbar Slaves
Communications I/O System
eMIOS A
16-ch
eMIOS B
16-ch
3x
CAN
4x
UART/LIN
3x
SPI
4x
I
2
C
SGM
20-ch
ADC
10-bit
SSD
6x
SMD
ADC
CAN
DCU
DMA
DRAM
ECC
eMIOS
FMPLL
GFX
I
2
C
JTAG
MMU
PBRIDGE
PIT
RLE
– Analog-to-digital converter
– Controller area network controller
– Display control unit
– Direct memory access controller
– Dynamic random-access memory
– Error correction code
– Timed input/output
– Frequency-modulated phase-locked loop
– OpenVG graphics accelerator
– Inter-integrated circuit controller
– Joint Test Action Group interface
– Memory management unit
– Peripheral I/O bridge
– Periodic interrupt timer
– Run length encoding
RTC
RSDS
SGM
SMD SSD
SPI
SRAM
STM
SWT
TCON
UART/LIN
VIU2
VLE
VREG
– Real time clock
– Reduced-swing differential sgnal interface
– Sound generator module
– Stepper motor driver/stepper stall detect
– Serial peripheral interface controller
– Sraric random-access memory
– System timer module
– Software watchdog timer
– Timing controller
– Universal asynchronous receiver/transmitter/
local interconnect network
– Video input unit
– Variable-length execution set
– Voltage regulator
Figure 1. PXD20 block diagram
PXD20 Microcontroller Data Sheet, Rev. 2
4
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
Overview
1.3
•
Feature list
Dual-issue, 32-bit Power Architecture Book E compliant CPU core complex (e200z4d)
— Memory Management Unit (MMU)
— 4 KB, 2/4-way instruction cache
2 MB on-chip ECC flash memory with:
— Flash memory controller
— Prefetch buffers
64 KB on-chip ECC SRAM
1 MB on-chip non-ECC graphics SRAM with two-port graphics SRAM controller
Memory Protection Unit (MPU) with up to 16 region descriptors and 32-byte region granularity to provide basic
memory access permission and ensure separation between different codes and data
Interrupt Controller (INTC) with 181 peripheral interrupt sources and eight software interrupts
Two Frequency-Modulated Phase-Locked Loops (FMPLLs)
— Primary FMPLL (FMPLL0) provides a system clock up to 125 MHz
— Auxiliary FMPLL (FMPLL1) is available for use as an alternate, modulated or non-modulated clock source to
eMIOS modules, QuadSPI and as alternate clock to the DCU and DCU-Lite for pixel clock generation
Crossbar switch architecture enables concurrent access of peripherals, flash memory or RAM from multiple bus
masters
16-channel Enhanced Direct Memory Access controller (eDMA) with multiple transfer request sources using a DMA
channel multiplexer
Boot Assist Module (BAM) with 8 KB dedicated ROM for embedded boot code supports boot options including
download of boot code via a serial link (CAN or SCI)
Two Display Control Units (DCU3 and DCULite) for direct drive of up to two TFT LCD displays up to XGA
resolution
Timing Controller (TCON) and RSDS interface for the DCU3 module
2D OpenVG 1.1 and raster graphics accelerator (GFX2D)
Video Input Unit (VIU2) supporting 8/10-bit ITU656 video input, YUV to RGB conversion, video down-scaling,
de-interlacing, contrast adjustment and brightness adjustment.
DRAM controller supporting DDR1, DDR2, LPDDR1 and SDR DRAMs
Stepper Motor Controller (SMC)
— High-current drivers for as many as six stepper motors driven in full dual H-bridge configuration
— Stepper motor return-to-zero and stall detection module
— Stepper motor short circuit detection
Sound Generator Module (SGM)
— 4-channel mixer
— Supports PCM wave playback and synthesized tones
— Optional PWM or I
2
S outputs
Two 16-channel Enhanced Modular Input Output System (eMIOS) modules
— Support a range of 16-bit Input Capture, Output Compare, Pulse Width Modulation and Quadrature Decode
functions
10-bit Analog-to-Digital Converter (ADC) with a maximum conversion time of 1
s
— Up to 20 internal channels
— Up to 8 external channels
Three Deserial Serial Peripheral Interface (DSPI) modules for full-duplex, synchronous, communications with
external devices
QuadSPI serial flash memory controller
— Supports single, dual and quad IO serial flash memory
PXD20 Microcontroller Data Sheet, Rev. 2
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Freescale Semiconductor
Preliminary—Subject to Change Without Notice
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