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FSA2268 / FSA2268T — Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD
February 2012
FSA2268 / FSA2268T Low-Voltage Dual-SPDT
(0.4) Analog Switch with 16kV ESD
Features
0.4Ω Typical On Resistance (R
ON
) for +3.0V Supply
0.25Ω Maximum R
ON
Flatness for +3.0V Supply
-3db Bandwidth: > 50MHz
Low I
CCT
Current Over an Expanded Control Input
Range
Packaged in Pb-free 10-Lead µMLP (1.4 x 1.8mm)
Power-Off Protection on Common Ports
Broad V
CC
Operating Range: 1.65 to 4.3V
HBM JEDEC: JESD22-A114
-
I/O to GND: 13.5kV
-
Power to GND: 16.0kV
Noise Immunity Termination Resistors in FSA2268T
Description
The FSA2268 is a high-performance, dual Single Pole
Double Throw (SPDT) analog switch that features ultra-
low R
ON
of 0.4 (typical) at 3.0V V
CC
. The FSA2268
operates over a wide V
CC
range of 1.65V to 4.3V and is
designed for break-before-make operation. The select
input is TTL-level compatible.
The FSA2268 features very low quiescent current even
when the control voltage is lower than the V
CC
supply.
This feature suits mobile handset applications by
allowing direct interface with baseband processor
general-purpose I/Os with minimal battery consumption.
The FSA2268T includes termination resistors that
improve noise immunity during overshoot excursions,
off-isolation coupling, or “pop-minimization.”
Applications
Cell Phone, PDA, Digital Camera, and Notebook
LCD Monitor, TV, and Set-Top Box
IMPORTANT NOTE:
For
additional
information,
analogswitch@fairchildsemi.com.
please
contact
Ordering Information
Part Number
FSA2268UMX
FSA2268TUMX
FSA2268L10X
Top Mark
GF
GH
GH
Package Description
10-Lead, Quad Ultrathin Molded Leadless Package (UMLP), 1.4 x 1.8mm,
0.4mm Pitch
10-Lead, Quad Ultrathin Molded Leadless Package (UMLP), 1.4 x 1.8mm,
0.4mm Pitch
10-Lead, MicroPak™, 1.6mm Wide
Analog Symbols
1B0
1B1
1A
S1
1B0
1B1
2B0
2B1
2A
S2
1A
S1
GND
2B0
2B1
2A
S2
GND
Figure 1.
FSA2268
Figure 2.
FSA2268T (with Noise Termination Resistors)
© 2007 Fairchild Semiconductor Corporation
FSA2268/2268T Rev. 1.0.9
www.fairchildsemi.com
FSA2268 / FSA2268T — Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD
Pin Configuration
Vcc
2B
0
1B
1
2B
1
GND
2A
3
4
5
6
7
2
1
10 1B
0
9
8
V
CC
1A
10
1B0
1B1
2B0
2B1
1
2
3
4
5
GND
9
8
7
6
1A
S1
S2
2A
S2 S1
Figure 3. Pin Assignment 10-Pin UMLP
(Top-Through View)
Figure 4.
10-Lead MicroPak™
Pin Descriptions
Pin # UMLP
1
2
3
4
5
6
7
8
9
10
Pin # MicroPak™
2
3
4
5
6
7
8
9
10
1
Name
1B
1
2B
0
2B
1
GND
2A
S2
S1
1A
V
CC
1B
0
Description
Data Ports
Data Ports
Data Ports
Ground
Data Ports
Switch Select Pins
Switch Select Pins
Data Ports
Supply Voltage
Data Ports
Truth Table
Control Input, Sn
LOW Logic Level
HIGH Logic Level
Function
nB0 connected to nA (FSA2268/2268T); nB1 terminated to GND (FSA2268T only)
nB1 connected to nA (FSA2268/2268T); nB0 terminated to GND (FSA2268T only)
© 2007 Fairchild Semiconductor Corporation
FSA2268/2268T Rev. 1.0.9
www.fairchildsemi.com
2
FSA2268 / FSA2268T — Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol Parameter
V
CC
V
SW
V
IN
I
IK
I
SW
I
SWPEAK
T
STG
T
J
T
L
MSL
Supply Voltage
Switch I/O Voltage
(1)
Control Input Voltage
(1)
Input Clamp Diode Current
Switch I/O Current (Continuous)
Peak Switch Current (Pulsed at 1ms Duration, <10% Duty Cycle)
Storage Temperature Range
Maximum Junction Temperature
Lead Temperature (Soldering, 10 seconds)
Moisture Sensitivity Level (JEDEC J-STD-020A)
I/O to GND
ESD
Human Body Model,
JEDEC: JESD22-A114
Power to GND
All Other Pins
1B0, 1B1, 2B0, 2B1, 1A, 2A Pins
T Version nBn Pin Off
S1, S2
Min.
-0.5
-0.5
0
-0.5
Max.
5.5
V
CC
+ 0.3
1.4
5.5
-50
350
500
Units
V
V
V
mA
mA
mA
°C
°C
°C
Level
kV
-65
+150
+150
+260
1
13.5
16.0
9.0
2.0
Charged Device Model, JEDEC: JESD22-C101
kV
Note:
1. Input and output negative ratings may be exceeded if input and output diode current ratings are observed.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
V
CC
V
IN
V
SW
T
A
Supply Voltage
Control Input Voltage
Switch I/O Voltage
Operating Temperature
Parameter
Min.
1.65
0
0
-40
Max.
4.30
V
CC
V
CC
+85
Units
V
V
V
°C
© 2007 Fairchild Semiconductor Corporation
FSA2268/FSA2268T Rev. 1.0.9
www.fairchildsemi.com
3
FSA2268 / FSA2268T — Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD
DC Electrical Characteristics
All typical values are at 25ºC unless otherwise specified.
Symbol
Parameter
Conditions
V
CC
(V)
Min.
V
IH
Input Voltage High
3.6 to 4.3
2.7 to 3.6
2.3 to 2.7
1.65 to 1.95
3.6 to 4.3
V
IL
Input Voltage Low
2.7 to 3.6
2.3 to 2.7
1.65 to 1.95
V
IN
=0 to V
CC
nA=0.3V, V
CC
–0.3V
nB0 or nB1=V
CC
-0.3V,
0.3V, or Floating
Figure 6
nA=0.3V, nB0 or
nB1=0V or Floating
Figure 6
nA=0.3V, V
CC
–0.3V
nB0 or nB1=V
CC
-0.3V,
0.3V, or Floating
Figure 7
Common Port (1A, 2A),
V
IN
=0V to 4.3V, V
CC
=0V
nB0, nB1=Floating
Common Port (1A, 2A),
V
IN
=0V to 4.3V, V
CC
=0V
nB0, nB1=0V or
Floating
I
ON
=100mA, nB0 or
nB1=0.7V, 3.6V
Figure 5
I
ON
=100mA, nB0 or
nB1=0.7V, 2.3V
Figure 5
R
ON
Switch On Resistance
(2)(5)
T
A
=+25ºC
T
A
=-40 to
+85ºC
Unit
Typ.
Max.
Min.
1.7
1.5
1.4
0.9
Max.
V
0.7
0.5
0.4
0.4
V
V
µA
I
IN
I
NO(0FF),
I
NC(OFF)
FSA2268
Control Input Leakage
(S1,S2)
Off Leakage Current of
Port nB0 and nB1
1.65 to 4.30
-0.5
0.5
1.95 to 4.30
-10
10
-50
50
nA
Off Leakage Current of
I
NC(OFF)
Port nB0 and nB1 (with
FSA2268T
Termination Resistors)
On Leakage Current of
Port nA
Power-Off Leakage
Current (Common Port
Only 1A, 2A)
1.95 to 4.30
-10
10
-50
50
µA
I
A(ON)
1.95 to 4.30
-20
20
-100
100
nA
I
OFF
FSA2268
0V
±1
µA
Power-Off Leakage
I
OFF
Current (Common Port
FSA2268T
Only 1A, 2A)
0V
±40
µA
4.30
0.30
0.50
3.00
0.40
0.55
I
ON
=100mA, nB0 or
nB1=0V, 0.7V, 1.6V,
2.3V
Figure 5
I
ON
=100mA, nB0 or
nB1=0V, 0.7V, 1.65V
Figure 5
Ω
2.30
0.52
1.65
4.30
3.00
2.30
1.65
1.00
0.04
0.06
0.12
1.00
0.13
0.13
∆R
ON
On Resistance Matching
(3)(5)
Between Channels
I
ON
=100mA, nB0 or
nB1=0.7V
Ω
Continued on following page
…
© 2007 Fairchild Semiconductor Corporation
FSA2268/FSA2268T Rev. 1.0.9
www.fairchildsemi.com
4
FSA2268 / FSA2268T — Low-Voltage Dual-SPDT (0.4) Analog Switch with 16kV ESD
DC Electrical Characteristics
(Continued)
All typical values are at 25ºC unless otherwise specified.
T
A
=+25ºC
Symbol
Parameter
Conditions
V
CC
(V)
Min.
(4)(5)
T
A
=-40 to
+85ºC
Max.
Min.
Max.
0.25
0.25
Unit
Typ.
R
FLAT(ON)
On Resistance Flatness
I
OUT
=100mA, nB0 or
nB1=0V to V
CC
4.30
3.00
2.30
1.65
0.5
0.6
200
Ω
R
TERM
I
CC
I
CCT
Internal Termination
(6)
Resistors
Quiescent Supply Current
Increase in I
CC
per Input
V
IN
=0 or V
CC
, I
OUT
=0
Input at 2.6V
Input at 1.8V
4.30
4.30
-100
Ω
100
-500
500
7
15
nA
µA
3
7
Notes:
2. On resistance is determined by the voltage drop between A and B pins at the indicated current through the switch.
3.
∆R
ON
=R
ON max
– R
ON min
measured at identical V
CC
, temperature, and voltage.
4. Flatness is defined as the difference between the maximum and minimum value of on resistance (R
ON
) over the
specified range of conditions.
5. Guaranteed by characterization, not production tested, for V
CC
=1.65-3.00V.
6. Guaranteed by characterization, not production tested.
© 2007 Fairchild Semiconductor Corporation
FSA2268/FSA2268T Rev. 1.0.9
www.fairchildsemi.com
5
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