SY100E111AEJYTR datasheet, PDF

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SY100E111AEJYTR: Description100E SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28, LEAD FREE, PLASTIC, LCC-28; Categorylogic logic; File Size152KB，7 Pages; ManufacturerMicrel ( Microchip ); Websitehttps://www.microchip.com; Environmental Compliance

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SY100E111AEJYTR Overview

100E SERIES, LOW SKEW CLOCK DRIVER, 9 TRUE OUTPUT(S), 0 INVERTED OUTPUT(S), PQCC28, LEAD FREE, PLASTIC, LCC-28

SY100E111AEJYTR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Micrel ( Microchip )
Parts packaging code	QLCC
package instruction	QCCJ,
Contacts	28
Reach Compliance Code	compliant
series	100E
Input adjustment	DIFFERENTIAL
JESD-30 code	S-PQCC-J28
JESD-609 code	e3
length	11.48 mm
Logic integrated circuit type	LOW SKEW CLOCK DRIVER
Humidity sensitivity level	2
Number of functions	1
Number of inverted outputs
Number of terminals	28
Actual output times	9
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Package shape	SQUARE
Package form	CHIP CARRIER
Peak Reflow Temperature (Celsius)	245
propagation delay (tpd)	0.73 ns
Certification status	Not Qualified
Same Edge Skew-Max（tskwd）	0.05 ns
Maximum seat height	4.37 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.2 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	ECL
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	11.48 mm

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Micrel, Inc.

5V/3.3V 1:9 DIFFERENTIAL

CLOCK DRIVER (w/ENABLE)

SY10E111AE/LE

SY100E111AE/LE

Precision Edge

SY10E111AE/LE

Precision Edge

SY100E111AE/LE

FEATURES

■

5V and 3.3V power supply options

■

200ps part-to-part skew

■

50ps output-to-output skew

■

Differential design

■

output

■

Enable Input

■

Voltage and temperature compensated outputs

■

75K

Ω

input pulldown resistors

■

Fully compatible with Motorola MC10/100E111

■

Available in 28-pin PLCC package

Precision Edge

DESCRIPTION

The SY10/100E111AE/LE are low skew 1-to-9 differential

drivers designed for clock distribution in mind. The SY10/

100E111AE/LE's function and performance are similar to

the popular SY10/100E111, with the improvement of lower

jitter and the added feature of low voltage operation. It

accepts one signal input, which can be either differential or

single-ended if the V

output is used. The signal is fanned

out to 9 identical differential outputs. An enable input is

also provided such that a logic HIGH disables the device by

forcing all Q outputs LOW and all Q outputs HIGH.

The E111AE/LE is specifically designed, modeled and

produced with low skew as the key goal. Optimal design

and layout serve to minimize gate to gate skew within a

device, and empirical modeling is used to determine process

control limits that ensure consistent t

distributions from

lot to lot. The net result is a dependable, guaranteed low

skew device.

To ensure that the tight skew specification is met it is

necessary that both sides of the differential output are

terminated into 50Ω, even if only one side is being used. In

most applications, all nine differential pairs will be used

and therefore terminated. In the case where fewer that

nine pairs are used, it is necessary to terminate at least the

output pairs on the same package side as the pair(s) being

used on that side, in order to maintain minimum skew.

Failure to do this will result in small degradations of

propagation delay (on the order of 10-20ps) of the output(s)

being used which, while not being catastrophic to most

designs, will mean a loss of skew margin.

The E111AE/LE, as with most other ECL devices, can

be operated from a positive V

supply in PECL mode.

This allows the E111AE/LE to be used for high performance

clock distribution in +5V/+3.3V systems. Designers can

take advantage of the E111AE/LE's performance to

distribute low skew clocks across the backplane or the

board. In a PECL environment, series or Thevenin line

terminations are typically used as they require no additional

power supplies. For systems incorporating GTL, parallel

termination offers the lowest power by taking advantage of

the 1.2V supply as terminating voltage.

BLOCK DIAGRAM

PIN NAMES

IN, IN

, Q

— Q

, Q

CCO

Function

Differential Input Pair

Enable Input

Differential Outputs

Output

to Output

Precision Edge is a registered trademark of Micrel, Inc.

M9999-030509

hbwhelp@micrel.com or (408) 955-1690

Rev.: K

Amendment: /0

March 2009

Rev. Date:

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