PRELIMINARY DATA SHEET
µ
PD23C16040AL
16M-BIT MASK-PROGRAMMABLE ROM
2M-WORD BY 8-BIT(BYTE MODE) / 1M-WORD BY 16-BIT(WORD MODE)
PAGE ACCESS MODE
MOS INTEGRATED CIRCUIT
Description
The
µ
PD23C16040AL is a 16,777,216 bits mask-programmable ROM. The word organization is selectable (BYTE
mode: 2,097,152 words by 8 bits, WORD mode: 1,048,576 words by 16 bits).
The active levels of OE (Output Enable Input) can be selected with mask-option.
The
µ
PD23C16040AL are packed in 44-pin plastic SOP, 48-pin plastic TSOP(I).
Features
•
Word organization
2,097,152 words by 8 bits (BYTE mode)
1,048,576 words by 16 bits (WORD mode)
•
Page access mode
BYTE mode
WORD mode
: 8 byte random page access
: 4 word random page access
•
Operating supply voltage: 2.7 V to 3.6 V
Operating supply voltage
V
CC
3.3 V
±
0.3 V
3.0 V
±
0.3 V
Access time/Page access time
ns (MAX.)
Power supply current
(Active mode)
mA(MAX.)
Standby current
(CMOS level input)
µ
A(MAX.)
30
30
85/25
100/30
60
55
Ordering Information
Part Number
Package
44-pin Plastic SOP (600 mil)
48-pin Plastic TSOP(I) (12 x 18 mm)(Normal bent)
48-pin Plastic TSOP(I) (12 x 18 mm)(Reverse bent)
µ
PD23C16040ALGX-xxx
µ
PD23C16040ALGY-xxx-MJH
µ
PD23C16040ALGY-xxx-MKH
(xxx: ROM code suffix No.)
The information in this document is subject to change without notice.
Document No. M13741EJ1V0DS00 (1st edition)
Date Published August 1998 NS CP(K)
Printed in Japan
The mark
•
shows major revised points.
©
1998
µ
PD23C16040AL
Pin Configuration (Marking Side)
/xxx indicates active low signal.
44-pin plastic SOP (600 mil)
[
µ
PD23C16040ALGX-xxx]
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
/CE
GND
/OE, OE, DC
O0
O8
O1
O9
O2
O10
O3
O11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
NC
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
WORD, /BYTE
GND
O15, A−1
O7
O14
O6
O13
O5
O12
O4
V
CC
A0 - A19
O0 - O7, O8 - O14
O15, A–1
: Address inputs
: Data outputs
: Data 15 output(WORD mode),
LSB address input(BYTE mode)
WORD, /BYTE
/CE
/OE, OE
V
CC
GND
NC
DC
Note
: Mode select
: Chip Enable
: Output Enable
: Supply voltage
: Ground
: No Connection
: Don’t Care
Note
Some signals can be applied because this pin is not connected to the inside of the chip.
2
Preliminary Data Sheet
µ
PD23C16040AL
48-pin plastic TSOP(I) (12 x 18 mm) (Normal bent)
[
µ
PD23C16040ALGY-xxx-MJH]
WORD, /BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
/CE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
GND
GND
O15, A−1
O7
O14
O6
O13
O5
O12
O4
V
CC
V
CC
NC
O11
O3
O10
O2
O9
O1
O8
O0
/OE, OE, DC
GND
GND
A0 - A19
O0 - O7, O8 - O14
O15, A–1
: Address inputs
: Data outputs
: Data 15 output(WORD mode),
LSB address input(BYTE mode)
WORD, /BYTE
/CE
/OE, OE
V
CC
GND
NC
DC
Note
: Mode select
: Chip Enable
: Output Enable
: Supply voltage
: Ground
: No Connection
: Don’t Care
Note
Some signals can be applied because this pin is not connected to the inside of the chip.
Preliminary Data Sheet
3
µ
PD23C16040AL
48-pin plastic TSOP(I) (12 x 18 mm) (Reverse bent)
[
µ
PD23C16040ALGY-xxx-MKH]
GND
GND
O15, A−1
O7
O14
O6
O13
O5
O12
O4
V
CC
V
CC
NC
O11
O3
O10
O2
O9
O1
O8
O0
/OE, OE, DC
GND
GND
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
WORD, /BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
NC
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
/CE
A0 - A19
O0 - O7, O8 - O14
O15, A–1
: Address inputs
: Data outputs
: Data 15 output(WORD mode),
LSB address input(BYTE mode)
WORD, /BYTE
/CE
/OE, OE
V
CC
GND
NC
DC
Note
: Mode select
: Chip Enable
: Output Enable
: Supply voltage
: Ground
: No Connection
: Don’t Care
Note
Some signals can be applied because this pin is not connected to the inside of the chip.
4
Preliminary Data Sheet
µ
PD23C16040AL
Input/Output Pin Functions
Pin name
WORD, /BYTE
Input/Output
Input
Function
The pin for switching BYTE mode and WORD mode.
High level
: WORD mode (1M-word by 16-bit)
Low level
: BYTE mode (2M-word by 8-bit)
A0 to A19
(Address inputs)
Address bus.
A0 to A19 are used differently in the WORD mode and the BYTE mode.
WORD mode (1M-word by 16-bit)
A0 to A19 are used as 20 bits address signals.
BYTE mode (2M-word by 8-bit)
A0 to A19 are used as the upper 20 bits of total 21 bits of address signal.
(The least significant bit (A−1) is combined to O15.)
O0 to O7,
O8 to O14
(Data output)
Output
Output data bus.
O0 to O7, O8 to O14 are used differently in the WORD mode and the BYTE mode.
WORD mode (1M-word by 16-bit)
The lower 15 bits of 16 bits data outputs to O0 to O14.
(The most significant bit (O15) combined to A−1.)
BYTE mode (2M-word by 8-bit)
8 bits data outputs to O0 to O7 and also O8 to O14 are high impedance.
O15, A−1
(Data output 15) ,
(LSB Address input)
Input, Output O15, A−1 are used differently in the WORD mode and the BYTE mode.
WORD mode (1M-word by 16-bit)
The most significant output data bus (O15).
BYTE mode (2M-word by 8-bit)
The least significant address bus (A−1).
/CE
(Chip Enable)
Input
Chip activating signal.
When the OE is active, output states are following.
High level
: High impedance
Low level
: Data out
/OE, OE, DC
(Output Enable, Don't care)
V
CC
GND
NC
−
−
−
Output enable signal. The active level of OE is mask option. The active level of OE
can be selected from high active, low active and Don’t care at order.
Supply voltage
Ground
Not internally connected. (The signal can be connected.)
Preliminary Data Sheet
5
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