They use a precision internal reference or a precision
external reference for rail-to-rail operation. The
MAX5138/MAX5139 accept a wide +2.7V to +5.25V sup-
ply-voltage range to accommodate most low-power and
low-voltage applications. These devices accept a 3-wire
SPI-/QSPI
TM
-/MICROWIRE
®
-/DSP-compatible serial
interface to save board space and reduce the complexi-
ty of optically isolated and transformer-isolated applica-
tions. The digital interface’s double-buffered hardware
and software
LDAC
provide simultaneous output update.
The serial interface features a
READY
output for easy
daisy-chaining of several MAX5138/MAX5139 devices
and/or other compatible devices. The MAX5138/MAX5139
include a hardware input to reset the DAC outputs to
zero or midscale upon power-up or reset, providing
additional safety for applications that drive valves or
other transducers that need to be off during power-up.
The high linearity of the DACs makes these devices ideal
for precision control and instrumentation applications.
The MAX5138/MAX5139 are available in an ultra-small
(3mm x 3mm), 16-pin TQFN package and are specified
over the -40°C to +105°C extended industrial tempera-
ture range.
Features
♦
16-/12-Bit Resolution in a 3mm x 3mm, 16-Pin
TQFN Package
♦
Hardware-Selectable on Power-Up or Reset-to-
Zero/Midscale DAC Output
♦
Double-Buffered Input Registers
♦
LDAC
Asynchronously Updates DAC Output
♦
READY
Facilitates Daisy Chaining
♦
High-Performance 10ppm/°C Internal Reference
♦
Guaranteed Monotonic Over All Operating
Conditions
♦
Wide +2.7V to +5.25V Supply Range
♦
Rail-to-Rail Buffered Output Operation
♦
Low Gain Error (Less Than ±0.5% FS) and Offset
(Less Than ±10mV)
♦
30MHz 3-Wire SPI-/QSPI-/MICROWIRE-/
DSP-Compatible Serial Interface
♦
CMOS-Compatible Inputs with Hysteresis
♦
Low Power Consumption (I
SHDN
= 2µA max)
Ordering Information
PART
PIN-PACKAGE
RESOLUTION
(BITS)
Applications
Automatic Test Equipment
Automatic Tuning
Communication Systems
MAX5138BGTE+
16 TQFN-EP*
16
MAX5139GTE+
16 TQFN-EP*
12
Note:
All devices are specified over the -40°C to +105°C operating
temperature range.
+Denotes
a lead(Pb)-free/RoHS-compliant package.
*EP
= Exposed pad.
Pin Configuration
DVDD
OUT
N.C.
9
8
AGND
DIN
CS
SCLK
7
6
*EP
1
2
M/Z
3
LDAC
4
N.C.
5
Data Acquisition
Gain and Offset Adjustment
Portable Instrumentation
Power-Amplifier Control
Process Control and Servo Loops
Programmable Voltage and Current Sources
TOP VIEW
12
AVDD 13
REFI 14
REFO 15
AGND 16
11
10
MAX5138
MAX5139
+
Functional Diagram and Typical Operating Circuit appear
at end of data sheet.
QSPI is a trademark of Motorola Inc.
MICROWIRE is a registered trademark of National
Semiconductor Corp.
*CONNECT EP TO AGND OR LEAVE UNCONNECTED
For pricing, delivery, and ordering information, please contact Maxim Direct at
1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
N.C.
READY
19-4428; Rev 2; 10/12
MAX5138/MAX5139
Low-Power, Single, 16-/12-Bit,
Buffered Voltage-Output DACs
ABSOLUTE MAXIMUM RATINGS
AVDD to AGND ........................................................-0.3V to +6V
DVDD to AGND ........................................................-0.3V to +6V
OUT to AGND...............................................-0.3V to the lower of
(AVDD + 0.3V) and +6V
REFI, REFO, M/Z to AGND ...........................-0.3V to the lower of
(AVDD + 0.3V) and +6V
SCLK, DIN,
CS
to AGND ..............................-0.3V to the lower of
(DVDD + 0.3V) and +6V
LDAC, READY
to AGND...............................-0.3V to the lower of
(DVDD + 0.3V) and +6V
Continuous Power Dissipation (T
A
= +70°C)
16-Pin TQFN (derate at 14.7mW/°C above +70°C) ..1176.5mW
Maximum Current into Any Input or Output
with the Exception of M/Z Pin .......................................±50mA
Maximum Current into M/Z Pin ...........................................±5mA
Operating Temperature Range .........................-40°C to +105°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
AVDD
= 2.7V to 5.25V, V
DVDD
= 2.7V to 5.25V, V
AVDD
≥
V
DVDD
, V
AGND
= 0V, V
REFI
= V
AVDD
- 0.25V, C
OUT
= 200pF, R
OUT
= 10kΩ,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
STATIC ACCURACY (Notes 1, 2)
Resolution
MAX5138 Integral Nonlinearity
MAX5139 Integral Nonlinearity
Differential Nonlinearity
Offset Error
Offset-Error Drift
Gain Error
Gain Temperature Coefficient
REFERENCE INPUT
V
AVDD
= 3V to 5.25V
Reference-Input Voltage Range
Reference Input Impedance
INTERNAL REFERENCE
Reference Voltage
Reference Temperature Coefficient
Reference Output Impedance
Line Regulation
Maximum Capacitive Load
C
R
V
REFO
T
A =
+25°C
(Note 5)
2.437
2.440
10
1
100
0.1
ppm/V
nF
2.443
25
V
ppm/°C
V
REFI
V
AVDD
= 2.7V to 3V
2
2
113
V
AVDD
V
AVDD
- 0.2
V
k
GE
(Note 4)
-0.5
N
INL
INL
DNL
OE
MAX5138
MAX5139
V
REFI
= 5V,
V
AVDD
= 5.25V
(Note 3)
T
A
= +25°C
-1
-1.0
-10
±1
±4
±0.2
±2
+0.5
±0.25
16
12
-9
±2
+11
±6
+1
+1.0
+10
Bits
LSB
LSB
LSB
mV
μV/°C
% of FS
ppm
FS/°C
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
REFI
= 5V, V
AVDD
= 5.25V
Guaranteed monotonic
(Note 4)
2
Maxim Integrated
MAX5138/MAX5139
Low-Power, Single, 16-/12-Bit,
Buffered Voltage-Output DACs
ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= 2.7V to 5.25V, V
DVDD
= 2.7V to 5.25V, V
AVDD
≥
V
DVDD
, V
AGND
= 0V, V
REFI
= V
AVDD
- 0.25V, C
OUT
= 200pF, R
OUT
= 10kΩ,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
DAC OUTPUT VOLTAGE (Note 2)
Output Voltage Range
DC Output Impedance
Maximum Capacitive Load
(Note 5)
Resistive Load
Short-Circuit Current
Power-Up Time
C
L
R
L
I
SC
V
AVDD
= 5.25V
V
AVDD
= 2.7V
From power-down mode
0.7 x
V
DVDD
0.3 x
V
DVDD
V
IN
= 0V or V
DVDD
-1
±0.1
+1
10
V
DVDD
- 0.5
0.4
1.25
5
0.5
25
10kHz
1Hz to 10kHz
120
18
-40
Series resistance = 0
Series resistance = 500
2
±35
±20
25
+40
No load
0.02
0.1
0.2
15
nF
μF
k
mA
μs
V
AVDD
- 0.02
V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS (SCLK, DIN,
CS, LDAC)
(Note 6)
Input High Voltage
Input Low Voltage
Input Leakage Current
Input Capacitance
DIGITAL OUTPUTS (READY)
Output High Voltage
Output Low Voltage
DYNAMIC PERFORMANCE
Voltage-Output Slew Rate
Voltage-Output Settling Time
Digital Feedthrough
Major Code Transition Analog
Glitch Impulse
Output Noise
Integrated Output Noise
SR
t
S
Positive and negative
1/4 scale to 3/4 scale V
REFI
= V
AVDD
= 5V
settle to ±2 LSB (Note 5)
Code 0, all digital inputs from 0V to V
DVDD
V/μs
μs
nV•s
nV•s
nV/
Hz
μV
V
OH
V
OL
I
SOURCE
= 3mA
I
SINK
= 2mA
V
V
V
IH
V
IL
I
IN
C
IN
V
V
μA
pF
Maxim Integrated
3
MAX5138/MAX5139
Low-Power, Single, 16-/12-Bit,
Buffered Voltage-Output DACs
ELECTRICAL CHARACTERISTICS (continued)
(V
AVDD
= 2.7V to 5.25V, V
DVDD
= 2.7V to 5.25V, V
AVDD
≥
V
DVDD
, V
AGND
= 0V, V
REFI
= V
AVDD
- 0.25V, C
OUT
= 200pF, R
OUT
= 10kΩ,
T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
POWER REQUIREMENTS (Note 7)
Analog Supply Voltage Range
Digital Supply Voltage Range
Supply Current
Power-Down Supply Current
AVDD
DVDD
I
AVDD
I
DVDD
I
AVPD
I
DVPD
f
SCLK
t
CH
t
CL
t
CSS
t
CSH
t
DS
t
DH
t
SRL
t
CSW
t
LDACPWL
(Note 9)
33
33
No load, all digital inputs at 0V or V
DVDD
No load, all digital inputs at 0V or V
DVDD
2.7
2.7
1
1
0.2
0.1
0
13
13
8
5
10
2
30
5.25
V
AVDD
1.6
10
2
2
30
V
V
mA
μA
μA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TIMING CHARACTERISTICS (Note 8) (Figure 1)
Serial-Clock Frequency
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS
Fall-to-SCLK Fall Setup Time
SCLK Fall-to
CS-Rise
Hold Time
DIN-to-SCLK Fall Setup Time
DIN-to-SCLK Fall Hold Time
SCLK Fall to
READY
Transition
CS
Pulse-Width High
LDAC
Pulse Width
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Static accuracy tested without load.
Linearity is tested within 20mV of AGND and AVDD
,
allowing for gain and offset error.
Codes above 2047 are guaranteed to be within ±9 LSB
.
Gain and offset tested within 100mV of AGND and AVDD
.
Guaranteed by design.
Device draws current in excess of the specified supply current when a digital input is driven with a voltage of V
VI
< V
DVDD
-
0.6V or V
VI
> 0.5V. At V
VI
= 2.2V with V
DVDD
= 5.25V, this current can be as high as 2mA. The SPI inputs are CMOS-input-level
compatible. The 30MHz clock frequency cannot be guaranteed for a minimum signal swing.
Note 7:
Excess current from AVDD is 10mA when powered without DVDD. Excess current from DVDD is 1mA when powered without
AVDD.
Note 8:
All timing specifications are with respect to the digital input and output thresholds.
Note 9:
Maximum daisy-chain clock frequency is limited to 25MHz.
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