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DPS256X32W-17C

Description
SRAM Module, 256KX32, 17ns, CMOS, PLASTIC, LEADLESS, SIMM-64
Categorystorage    storage   
File Size791KB,6 Pages
ManufacturerB&B Electronics Manufacturing Company
Download Datasheet Parametric View All

DPS256X32W-17C Overview

SRAM Module, 256KX32, 17ns, CMOS, PLASTIC, LEADLESS, SIMM-64

DPS256X32W-17C Parametric

Parameter NameAttribute value
MakerB&B Electronics Manufacturing Company
Parts packaging codeSIMM
package instructionSIMM, SSIM64
Contacts64
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time17 ns
Other featuresUSER CONFIGURABLE AS 1M X 8
Spare memory width16
I/O typeCOMMON
JESD-30 codeR-XSMA-N64
memory density8388608 bit
Memory IC TypeSRAM MODULE
memory width32
Number of functions1
Number of ports1
Number of terminals64
word count262144 words
character code256000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize256KX32
Output characteristics3-STATE
ExportableYES
Package body materialUNSPECIFIED
encapsulated codeSIMM
Encapsulate equivalent codeSSIM64
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
Parallel/SerialPARALLEL
power supply5 V
Certification statusNot Qualified
Maximum seat height14.986 mm
Maximum standby current0.08 A
Minimum standby current4.5 V
Maximum slew rate1.44 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formNO LEAD
Terminal pitch1.27 mm
Terminal locationSINGLE
1Mx8/512Kx16/256Kx32, 12 - 35ns, ZIP/SIMM/ASIMM
30A056-00
K
8 Megabit CMOS SRAM
DPS256X32L/DPS256X32W/DPS256X32WA
DESCRIPTION:
The DPS256X32L/DPS256X32W/DPS256X32WA is a
256K x 32 high density, high-speed Static Random Access
Memory (SRAM) module, intended for high performance
computers and digital signal processing applications. The
DPS256X32L/DPS256X32W/DPS256X32WA is comprised of
eight 256K x 4 devices surface mounted on an epoxy laminate
substrate.
FEATURES:
256K X 32, 512K x 16 or 1M x 8 Configuration
High Speed: 12*, 15, 17, 20, 25, 35ns
All Inputs and Outputs TTL Compatible
Fully Static Operation;
No Clock or Refresh Required
Equal Read Access and Write Cycle Time
Packages:
64-Pin ZIP
64-Pin SIMM
64-Pin Angled SIMM
*
Contact factory for availability.
PIN NAMES
A0 - A17
I/O0 - I/O31
CE0 - CE3
DID0 / DID1
OE
WE
V
DD
V
SS
Address Inputs
Data In/Out
Chip Enables
Density I.D. Pins
Output Enable
Write Enable
Power (+5V)
Ground
FUNCTIONAL BLOCK DIAGRAM
30A056-00
REV.
K
This document contains information on a product that is currently released
to production at Dense-Pac Microsystems, Inc. Dense-Pac reserves the
right to change products or specifications herein without prior notice.
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