X9408YZ24I datasheet, PDF - EEWORLD Datasheet

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X9408YZ24I: DescriptionDigital Potentiometer, 4 Func, 2500ohm, 2-wire Serial Control Interface, 64 Positions, CMOS, PBGA24, XBGA-24; CategoryAnalog mixed-signal IC converter; File Size109KB，20 Pages; ManufacturerXicor Inc.

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X9408YZ24I Overview

Digital Potentiometer, 4 Func, 2500ohm, 2-wire Serial Control Interface, 64 Positions, CMOS, PBGA24, XBGA-24

X9408YZ24I Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Xicor Inc.
package instruction	XBGA-24
Reach Compliance Code	unknown
Other features	NONVOLATILE MEMORY
control interface	2-WIRE SERIAL
Converter type	DIGITAL POTENTIOMETER
JESD-30 code	R-PBGA-B24
JESD-609 code	e0
length	3.824 mm
Number of functions	4
Number of positions	64
Number of terminals	24
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	VFBGA
Encapsulate equivalent code	BGA24,4X6,20
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
resistance law	LINEAR
Maximum resistor tolerance	20%
Maximum resistor terminal voltage	5.5 V
Minimum resistor terminal voltage	-5.5 V
Maximum seat height	0.763 mm
Nominal supply voltage	5 V
surface mount	YES
technology	CMOS
Nominal temperature coefficient	300 ppm/°C
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	0.5 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	NOT SPECIFIED
Nominal total resistance	2500 Ω
width	2.605 mm

X9408YZ24I Preview

PPLICATION

OTES

A V A I L A B L E

AN99 • AN115 • AN124 • AN133 • AN134 • AN135

Low Noise/Low Power/2-Wire Bus

X9408

Quad Digitally Controlled (XDCP

™

) Potentiometers

FEATURES

•

Four separate XDCP’s in one package

64 resistor taps per potentiometer

2-wire serial interface

Wiper resistance, 150

Ω

typical

Four nonvolatile data registers for each pot

Nonvolatile storage of wiper position

Standby current < 1µA max (total package)

= 2.7V to 5.5V operation

V+ = 2.7V to 5.5V

V– = –2.7V to –5.5V

• 10K

Ω

, 2.5K

Ω

total pot resistance

• 100 year data retention

• 24-lead SOIC, 24-lead TSSOP, and 24-lead XBGA

packages

DESCRIPTION

The X9408 integrates four digitally controlled

potentiometers (XDCP) on a monolithic CMOS

integrated circuit.

The digital controlled potentiometer is implemented

using 63 resistive elements in a series array. Between

each element are tap points connected to the wiper

terminal through switches. The position of the wiper on

the array is controlled by the user through the SPI bus

interface. Each potentiometer has associated with it a

volatile Wiper Counter Register (WCR) and four non-

volatile Data Registers that can be directly written to

and read by the user. The contents of the WCR

controls the position of the wiper on the resistor array

though the switches. Powerup recalls the contents of

the default data register (DR0) to the WCR.

The XDCP can be used as a three-terminal

potentiometer or as a two terminal variable resistor in

a wide variety of applications including control,

parameter adjustments, and signal processing.

BLOCK DIAGRAM

V+

V-

R0 R1

Pot 0

Wiper

Counter

(WCR)

R0 R1

Wiper

Counter

(WCR)

SCL

SDA

Interface

and

Control

Circuitry

Data

R2 R3

Resistor

Array

Pot 2

R0 R1

Wiper

Counter

(WCR)

Resistor

Array

Pot 1

R0 R1

Wiper

Counter

(WCR)

R2 R3

Resistor

Array

Pot 3

REV 1.0 6/20/00

www.xicor.com

Characteristics subject to change without notice.

1 of 20

X9408

PIN DESCRIPTIONS

Host Interface Pins

Serial Clock (SCL)

The SCL input is used to clock data into and out of the

X9408.

Serial Data (SDA)

SDA is a bidirectional pin used to transfer data into

and out of the device. It is an open drain output and

may be wire-ORed with any number of open drain or

open collector outputs. An open drain output requires

the use of a pull-up resistor. For selecting typical

values, refer to the guidelines for calculating typical

values on the bus pull-up resistors graph.

Device Address (A

–

)

The address inputs are used to set the least signiﬁcant

4 bits of the 8-bit slave address. A match in the slave

address serial data stream must be made with the

address input in order to initiate communication with

the X9408. A maximum of 16 devices may occupy the

2-wire serial bus.

Potentiometer Pins

–R

), R

–R

)

The R

and R

inputs are equivalent to the terminal

connections on either end of a mechanical

potentiometer.

–R

)

The wiper outputs are equivalent to the wiper output of

a mechanical potentiometer.

Hardware Write Protect Input (WP)

The WP pin when low prevents nonvolatile writes to

the wiper counter registers.

Analog Supplies V+, V-

The Analog Supplies V+, V- are the supply voltages

for the XDCP analog section.

PIN NAMES

Symbol

SCL

SDA

A0-A3

–R

, R

–R

V+,V-

Description

Serial Clock

Serial Data

Device Address

Potentiometer Pins

(terminal equivalent)

Potentiometer Pins

(wiper equivalent)

Hardware Write Protection

Analog Supplies

System Supply Voltage

System Ground

No Connection

PIN CONFIGURATION

DIP/SOIC

SDA

XBGA

V+

SCL

V-

V+

TSSOP

X9408

V-

SDA

V-

SCL

X9408

V+

SDA

SCL

Top View–Bumps Down

REV 1.0 6/20/00

www.xicor.com

Characteristics subject to change without notice.

2 of 20

X9408

PRINCIPLES OF OPERATION

The X9408 is a highly integrated microcircuit

incorporating four resistor arrays and their associated

registers and counters and the serial interface logic

providing direct communication between the host and

the XDCP potentiometers.

Serial Interface

The X9408 supports a bidirectional bus oriented

protocol. The protocol deﬁnes any device that sends

data onto the bus as a transmitter and the receiving

device as the receiver. The device controlling the

transfer is a master and the device being controlled is

the slave. The master will always initiate data transfers

and provide the clock for both transmit and receive

operations. Therefore, the X9408 will be considered a

slave device in all applications.

Clock and Data Conventions

Data states on the SDA line can change only during

SCL LOW periods (t

LOW

). SDA state changes during

SCL HIGH are reserved for indicating start and stop

conditions.

Start Condition

All commands to the X9408 are preceded by the start

condition, which is a HIGH to LOW transition of SDA

while SCL is HIGH (t

HIGH

). The X9408 continuously

monitors the SDA and SCL lines for the start condition

and will not respond to any command until this

condition is met.

Stop Condition

All communications must be terminated by a stop

condition, which is a LOW to HIGH transition of SDA

while SCL is HIGH.

Acknowledge

Acknowledge is a software convention used to provide

a positive handshake between the master and slave

devices on the bus to indicate the successful receipt of

data. The transmitting device, either the master or the

slave, will release the SDA bus after transmitting eight

bits. The master generates a ninth clock cycle and

during this period the receiver pulls the SDA line LOW

to acknowledge that it successfully received the eight

bits of data.

The X9408 will respond with an acknowledge after

recognition of a start condition and its slave address

and once again after successful receipt of the

command byte. If the command is followed by a data

byte the X9408 will respond with a ﬁnal acknowledge.

Array Description

The X9408 is comprised of four resistor arrays. Each

array contains 63 discrete resistive segments that are

connected in series. The physical ends of each array

are equivalent to the ﬁxed terminals of a mechanical

potentiometer (R

and R

inputs).

At both ends of each array and between each resistor

segment is a CMOS switch connected to the wiper

) output. Within each individual array only one

switch may be turned on at a time. These switches are

controlled by the Wiper Counter Register (WCR). The

six bits of the WCR are decoded to select, and enable,

one of sixty-four switches.

The WCR may be written directly, or it can be changed

by transferring the contents of one of four associated

Data Registers into the WCR. These Data Registers

and the WCR can be read and written by the host

system.

Device Addressing

Following a start condition the master must output the

address of the slave it is accessing. The most

signiﬁcant four bits of the slave address are the device

type identiﬁer (refer to Figure 1 below). For the X9408

this is ﬁxed as 0101[B].

Figure 1. Slave Address

Device Type

Identifier

Device Address

The next four bits of the slave address are the device

address. The physical device address is deﬁned by the

state of the A

-A

inputs. The X9408 compares the

serial data stream with the address input state; a

successful compare of all four address bits is required

for the X9408 to respond with an acknowledge. The

–A

inputs can be actively driven by CMOS input

signals or tied to V

or V

Characteristics subject to change without notice.

REV 1.0 6/20/00

www.xicor.com

3 of 20

X9408

Acknowledge Polling

The disabling of the inputs, during the internal

Nonvolatile write operation, can be used to take

advantage of the typical 5ms EEPROM write cycle

time. Once the stop condition is issued to indicate the

end of the nonvolatile write command the X9408

initiates the internal write cycle. ACK polling can be

initiated immediately. This involves issuing the start

condition followed by the device slave address. If the

X9408 is still busy with the write operation no ACK will

be returned. If the X9408 has completed the write

operation an ACK will be returned and the master can

then proceed with the next operation.

Flow 1. ACK Polling Sequence

Nonvolatile Write

Command Completed

Enter ACK Polling

point to one of the two pots and when applicable they

point to one of four associated registers. The format is

shown below in Figure 2.

Figure 2. Instruction Byte Format

Select

Instructions

Wiper Counter

The four high order bits deﬁne the instruction. The next

two bits (R1 and R0) select one of the four registers

that is to be acted upon when a register oriented

instruction is issued. The last bits (P1, P0) select which

one of the four potentiometers is to be affected by the

instruction.

Four of the nine instructions end with the transmission

of the instruction byte. The basic sequence is

illustrated in Figure 3. These two-byte instructions

exchange data between the Wiper Counter Register

and one of the Data Registers. A transfer from a Data

write to a static RAM. The response of the wiper to this

action will be delayed t

WRL

. A transfer from the Wiper

Counter Register (current wiper position), to a data

minimum of t

to complete. The transfer can occur

between one of the four potentiometers and one of its

associated registers; or it may occur globally, wherein

the transfer occurs between all of the potentiometers

and one of their associated registers.

Four instructions require a three-byte sequence to

complete. These instructions transfer data between the

host and the X9408; either between the host and one

of the data registers or directly between the host and

the Wiper Counter Register. These instructions are:

Read Wiper Counter Register (read the current wiper

position of the selected pot), Write Wiper Counter

pot), Read Data Register (read the contents of the

selected nonvolatile register) and Write Data Register

(write a new value to the selected Data Register). The

sequence of operations is shown in Figure 4.

Issue

START

Issue Slave

Address

Issue STOP

ACK

Returned?

YES

Further

Operation?

YES

Issue

Instruction

Issue STOP

Proceed

Instruction Structure

The next byte sent to the X9408 contains the instruction

and register pointer information. The four most

signiﬁcant bits are the instruction. The next four bits

REV 1.0 6/20/00

www.xicor.com

Characteristics subject to change without notice.

4 of 20

X9408

Figure 3. Two-Byte Instruction Sequence

SCL

SDA

R1 R0 P1 P0

The Increment/Decrement command is different from

the other commands. Once the command is issued and

the X9408 has responded with an acknowledge, the

master can clock the selected wiper up and/or down in

one segment steps; thereby, providing a ﬁne tuning

capability to the host. For each SCL clock pulse (t

HIGH

)

while SDA is HIGH, the selected wiper will move one

Table 1. Instruction Set

Instruction

Read Wiper Counter

Write Wiper Counter

Read Data Register

Write Data Register

XFR Data Register to

Wiper Counter Register

XFR Wiper Counter

Global XFR Data Reg-

isters to Wiper Counter

Registers

Global XFR Wiper

Counter Registers to

Data Register

Increment/Decrement

Wiper Counter Register

Note:

resistor segment towards the V

terminal. Similarly, for

each SCL clock pulse while SDA is LOW, the selected

wiper will move one resistor segment towards the V

terminal. A detailed illustration of the sequence and

timing for this operation are shown in Figures 5 and 6

respectively.

Instruction Set

1/0

Operation

1/0 1/0

1/0

1/0 Read the contents of the Wiper Counter Register

pointed to by P

–P

1/0 Write new value to the Wiper Counter Register pointed

to by P

–P

1/0 Read the contents of the Data Register pointed to by

–P

and R

–R

1/0 Write new value to the Data Register pointed to by

–P

and R

–R

1/0 Transfer the contents of the Data Register pointed to

by P

–P

and R

–R

to its associated Wiper Counter

1/0 Transfer the contents of the Wiper Counter Register

pointed to by P

–P

to the Data Register pointed to

by R

–R

0 Transfer the contents of the Data Registers pointed to

by R

–R

of all four pots to their respective Wiper

Counter Registers

0 Transfer the contents of both Wiper Counter Regis-

ters to their respective Data Registers pointed to by

–R

of all four pots

1/0 Enable Increment/decrement of the Wiper Counter

–P

(7) 1/0 = data is one or zero

REV 1.0 6/20/00

www.xicor.com

Characteristics subject to change without notice.

5 of 20

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X9408YZ24I Related Products

	X9408YZ24I	X9408WV24IT1	X9408WZ24I	X9408YS24IT1
Description	Digital Potentiometer, 4 Func, 2500ohm, 2-wire Serial Control Interface, 64 Positions, CMOS, PBGA24, XBGA-24	Digital Potentiometer, 4 Func, 10000ohm, 2-wire Serial Control Interface, 64 Positions, CMOS, PDSO24, PLASTIC, TSSOP-24	Digital Potentiometer, 4 Func, 10000ohm, 2-wire Serial Control Interface, 64 Positions, CMOS, PBGA24, XBGA-24	Digital Potentiometer, 4 Func, 2500ohm, 2-wire Serial Control Interface, 64 Positions, CMOS, PDSO24, PLASTIC, SOIC-24
Maker	Xicor Inc.	Xicor Inc.	Xicor Inc.	Xicor Inc.
package instruction	XBGA-24	PLASTIC, TSSOP-24	XBGA-24	PLASTIC, SOIC-24
Reach Compliance Code	unknown	unknown	unknown	unknow
Other features	NONVOLATILE MEMORY	NONVOLATILE MEMORY	NONVOLATILE MEMORY	NONVOLATILE MEMORY
control interface	2-WIRE SERIAL	2-WIRE SERIAL	2-WIRE SERIAL	2-WIRE SERIAL
Converter type	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER	DIGITAL POTENTIOMETER
JESD-30 code	R-PBGA-B24	R-PDSO-G24	R-PBGA-B24	R-PDSO-G24
length	3.824 mm	7.8 mm	3.824 mm	15.4 mm
Number of functions	4	4	4	4
Number of positions	64	64	64	64
Number of terminals	24	24	24	24
Maximum operating temperature	85 °C	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C	-40 °C
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VFBGA	TSSOP	VFBGA	SOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	SMALL OUTLINE
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
resistance law	LINEAR	LINEAR	LINEAR	LINEAR
Maximum resistor tolerance	20%	20%	20%	20%
Maximum resistor terminal voltage	5.5 V	5.5 V	5.5 V	5.5 V
Minimum resistor terminal voltage	-5.5 V	-5.5 V	-5.5 V	-5.5 V
Maximum seat height	0.763 mm	1.2 mm	0.763 mm	2.65 mm
Nominal supply voltage	5 V	5 V	5 V	5 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Nominal temperature coefficient	300 ppm/°C	300 ppm/°C	300 ppm/°C	300 ppm/°C
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	BALL	GULL WING	BALL	GULL WING
Terminal pitch	0.5 mm	0.65 mm	0.5 mm	1.27 mm
Terminal location	BOTTOM	DUAL	BOTTOM	DUAL
Nominal total resistance	2500 Ω	10000 Ω	10000 Ω	2500 Ω
width	2.605 mm	4.4 mm	2.605 mm	7.5 mm

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