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TC7USB221WBG

Description
Dual SPDT USB Switch
CategoryAnalog mixed-signal IC    The signal circuit   
File Size243KB,11 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
Download Datasheet Parametric View All

TC7USB221WBG Overview

Dual SPDT USB Switch

TC7USB221WBG Parametric

Parameter NameAttribute value
MakerToshiba Semiconductor
Parts packaging codeBGA
package instructionVFBGA,
Contacts10
Reach Compliance Codeunknown
Analog Integrated Circuits - Other TypesSPDT
JESD-30 codeR-PBGA-B10
length1.6 mm
Number of channels1
Number of functions2
Number of terminals10
Nominal off-state isolation36 dB
On-state resistance matching specifications0.5 Ω
Maximum on-state resistance (Ron)19 Ω
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeVFBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, VERY THIN PROFILE, FINE PITCH
Certification statusNot Qualified
Maximum seat height0.67 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Maximum disconnect time10 ns
Maximum connection time17 ns
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formBALL
Terminal pitch0.4 mm
Terminal locationBOTTOM
width1.2 mm
Base Number Matches1
TC7USB221WBG
CMOS Digital Integrated Circuits Silicon Monolithic
TC7USB221WBG
1. Functional Description
Dual SPDT USB Switch
2. General
The TC7USB221WBG is high-speed CMOS dual 1-2 multiplexer/demultiplexer. The low ON-resistance and the
low capacitance of the switch allow connections to USB application.
This device consists of dual individual two-inputs multiplexer/demultiplexer with common select input (S) and
output enable (OE). The D+/D- inputs is connected to the 1D+/1D- or 2D+/2D- outputs determined by the
combination both the select input (S) and output enable (OE). When the output enable (OE) input is held high
level, the switches are open with regardless the state of select inputs and a high-impedance state exists between
the switches.
All inputs are equipped with protection circuits against static discharge.
3. Features
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
Supply voltage: V
CC
= 2.3 to 3.6 V
Switch terminal ON-capacitance: C
I/O
= 7 pF Switch ON (typ.) @V
CC
= 3.3 V
ON-resistance: R
ON
= 6.5
(typ.) @V
CC
= 3 V, V
IS
= 0 V
R
ON
flatness: R
ON(flat)
= 1.6
(typ.)@V
CC
= 3 V
Difference of ON-resistance between switches:
∆R
ON
= 0.5
(typ.)@V
CC
= 3 V
ESD performance: Machine model
≥ ±200
V, Human body model
≥ ±2000
V
Power-down protection provided on all inputs and outputs.
Package: WCSP10B
4. Packaging and Pin Assignment (Top View)
S-UFBGA10-0202-0.40-001
4.1. Pin Assignment
1
A
B
C
D
1D+
1D-
2D+
2D-
2
V
CC
No Ball
No Ball
GND
3
S
D+
D-
OE
1
2011-07-22
Rev.1.0

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