The following document contains information on Cypress products.
FUJITSU MICROELECTRONICS
DATA SHEET
DS07-13728-5E
16-bit Microcontroller
CMOS
F
2
MC-16LX MB90455 Series
MB90F455 (S) /F456 (S) /F457 (S)
MB90455 (S) /456 (S) /457 (S) /V495G
■
DESCRIPTION
MB90455 series devices are general-purpose high-performance 16-bit micro controllers designed for process
control of consumer products, which require high-speed real-time processing.
The system, inheriting the architecture of F
2
MC* family, employs additional instruction ready for high-level lan-
guages, expanded addressing mode, enhanced multiply-divide instructions, and enriched bit-processing instruc-
tions. Furthermore, employment of 32-bit accumulator achieves processing of long-word data (32 bits).
The peripheral resources of MB90455 series include the following:
8/10-bit A/D converter, UART 1, 8/16-bit PPG timer, 16-bit input-output timer (16-bit free-run timer, input capture
0, 1, 2, 3 (ICU)).
*: F
2
MC is the abbreviation of FUJITSU Flexible Microcontroller.
■
FEATURES
•
Clock
• Built-in PLL clock frequency multiplication circuit
• Selection of machine clocks (PLL clocks) is allowed among frequency division by two on oscillation clock, and
multiplication of 1 to 4 times of oscillation clock (for 4-MHz oscillation clock, 4 MHz to 16 MHz).
• Operation by sub-clock (8.192 kHz) is allowed.
• Minimum execution time of instruction: 62.5 ns (when operating with 4-MHz oscillation clock, and 4-time multi-
plied PLL clock).
(Continued)
For the information for microcontroller supports, see the following web site.
This web site includes the
"Customer Design Review Supplement"
which provides the latest cautions on
system development and the minimal requirements to be checked to prevent problems before the system
development.
http://edevice.fujitsu.com/micom/en-support/
Copyright©2002-2009 FUJITSU MICROELECTRONICS LIMITED All rights reserved
2009.8
MB90455 Series
•
16 Mbyte CPU memory space
• 24-bit internal addressing
•
Instruction system best suited to controller
• Wide choice of data types (bit, byte, word, and long word)
• Wide choice of addressing modes (23 types)
• Enhanced multiply-divide instructions and RETI instructions
• Enhanced high-precision computing with 32-bit accumulator
•
Instruction system compatible with high-level language (C language) and multitask
• Employing system stack pointer
• Enhanced various pointer indirect instructions
• Barrel shift instructions
•
Increased processing speed
• 4-byte instruction queue
•
Powerful interrupt function with 8 levels and 34 factors
•
Automatic data transfer function independent of CPU
• Expanded intelligent I/O service function (EI
2
OS): Maximum of 16 channels
•
Low power consumption (standby) mode
• Sleep mode (a mode that halts CPU operating clock)
• Time-base timer mode (a mode that operates oscillation clock, sub clock, time-base timer and watch timer only)
• Watch mode (a mode that operates sub clock and watch timer only)
• Stop mode (a mode that stops oscillation clock and sub clock)
• CPU blocking operation mode
•
Process
• CMOS technology
•
I/O port
• General-purpose input/output port (CMOS output): 34 ports(MB90F455/F456/F457, MB90455/456/457) (in-
cluding 4 high-current output ports) (When sub clock is not used, 36 ports(MB90F455S/F456S/F457S,
MB90455S/456S/457S))
•
Timer
• Time-base timer, watch timer, watchdog timer: 1 channel
• 8/16-bit PPG timer: 8-bit x 4 channels, or 16-bit x 2 channels
• 16-bit reload timer: 2 channels
• 16-bit input/output timer
- 16-bit free run timer: 1 channel
- 16-bit input capture: (ICU): 4 channels
Interrupt request is issued upon latching a count value of 16-bit free run timer by detection of an edge on pin
input.
•
UART 1: 1 channel
• Equipped with full-duplex double buffer
• Clock-asynchronous or clock-synchronous serial transmission is available
(Continued)
2
DS07-13728-5E
MB90455 Series
(Continued)
•
DTP/External interrupt: 4 channels
• Module for activation of expanded intelligent I/O service (EI
2
OS), and generation of external interrupt.
•
Delay interrupt generator module
• Generates interrupt request for task switching.
•
8/10-bit A/D converter: 8 channels
• Resolution is selectable between 8-bit and 10-bit.
• Activation by external trigger input is allowed.
• Conversion time: 6.125
μs
(at 16-MHz machine clock, including sampling time)
•
Program patch function
• Address matching detection for 2 address pointers.
DS07-13728-5E
3
MB90455 Series
■
PRODUCT LINEUP
Part Number
Parameter
Classification
ROM capacity
RAM capacity
Clock
Process
Package
Operating power supply voltage
Special power supply for
emulator*
1
3.5 V to 5.5 V
⎯
Number of basic instructions
Instruction bit length
Instruction length
Data bit length
: 351 instructions
: 8 bits and 16 bits
: 1 byte to 7 bytes
: 1 bit, 8 bits, 16 bits
MB90F455 (S) /
F456 (S) /F457 (S)
Flash ROM
MB90455 (S) /
456 (S) /457 (S)
Mask ROM
MB90V495G
Evaluation product
⎯
6 Kbytes
2 systems
MB90F455 (S) : 24 Kbytes MB90455 (S) : 24 Kbytes
MB90F456 (S) : 32 Kbytes MB90456 (S) : 32 Kbytes
MB90F457 (S) : 64 Kbytes MB90457 (S) : 64 Kbytes
2 Kbytes
MB90455/456/457 :
MB90F455/F456/F457 :
2 systems
2 systems
MB90F455S/F456S/F457S : MB90455S/456S/457S :
1 system
1 system
CMOS
LQFP-48 (Pin pitch 0.50 mm)
PGA256
4.5 V
to
5.5 V
None
CPU functions
Minimum instruction execution time : 62.5 ns (at 16-MHz machine clock)
Interrupt processing time : 1.5
μs
at minimum (at 16-MHz machine clock)
Low power consumption
(standby) mode
I/O port
Time-base timer
Watchdog timer
16-bit free-run
timer
Input capture
Sleep mode/Watch mode/Time-base timer mode/
Stop mode/CPU intermittent
General-purpose input/output ports (CMOS output) : 34 ports (36 ports*
2
)
including 4 high-current output ports (P14 to P17)
18-bit free-run counter
Interrupt cycle : 1.024 ms, 4.096 ms, 16.834 ms, 131.072 ms
(with oscillation clock frequency at 4 MHz)
Reset generation cycle: 3.58 ms, 14.33 ms, 57.23 ms, 458.75 ms
(with oscillation clock frequency at 4 MHz)
Number of channels: 1
Interrupt upon occurrence of overflow
Number of channels: 4
Retaining free-run timer value set by pin input (rising edge, falling edge, and
both edges)
Number of channels: 2
16-bit reload timer operation
Count clock cycle: 0.25
μs,
0.5
μs,
2.0
μs
(at 16-MHz machine clock frequency)
External event count is allowed.
15-bit free-run counter
Interrupt cycle: 31.25 ms, 62.5 ms, 12 ms, 250 ms, 500 ms, 1.0 s, 2.0 s
(with 8.192 kHz sub clock)
(Continued)
4
DS07-13728-5E
16-bit input/
output timer
16-bit reload timer
Watch timer
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