NCN49597
Product Preview
Power Line Carrier Modem
ON Semiconductor’s NCN49597 is an IEC 61334−5−1 compliant
power line carrier modem using spread−FSK (S−FSK) modulation for
robust low data rate communication over power lines. NCN49597 is
built around an ARM processor core, and includes the MAC layer.
With this robust modulation technique, signals on the power lines can
pass long distances. The half−duplex operation is automatically
synchronized to the mains, and can be up to 4800 bits/sec.
The product configuration is done via its serial interface, which
allows the user to concentrate on the development of the application.
The NCN49597 is implemented in ON Semiconductor mixed signal
technology, combining both analog circuitry and digital functionality
on the same IC.
Features
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52
QFN52 8x8, 0.5P
CASE 485M
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Power Line Carrier Modem for 50 and 60 Hz Mains
Fully compliant to IEC 61334−5−1 and CENELEC EN 50065−1
Complete Handling of Protocol Layers Physical to MAC
Programmable Carrier Frequencies in CENELEC A-Band from 9 to
95 kHz; B−Band from 95 to 125 kHz, in 10 Hz Steps
Half Duplex
Data Rate Selectable:
300 – 600 – 1200
−
2400 – 4800 baud (@ 50 Hz)
360 – 720 – 1440
−
2880 – 5760 baud (@ 60 Hz)
Synchronization on Mains
Repetition Algorithm Boost the Robustness of Communication
SCI Port to Application Microcontroller
SCI Baudrate Selectable: 9.6 – 19.2 – 38.4
−
115.2 kb
Power Supply 3.3 V
Ambient Temperature Range:
−40°C
to +80°C
These Devices are Pb−Free and are RoHS Compliant*
ARM: Automated Remote Meter Reading
Remote Security Control
Streetlight Control
Transmission of Alerts (Fire, Gas Leak, Water Leak)
MARKING DIAGRAMS
52
1
ON
ARM
XXXXYZZ
NCN 49597
C597−901
e
3
XXXX
Y
ZZ
= Date Code
= Plant Identifier
= Traceability Code
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 27 of this data sheet.
Typical Applications
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
This document contains information on a product under development. ON Semiconductor
reserves the right to change or discontinue this product without notice.
©
Semiconductor Components Industries, LLC, 2011
December, 2011
−
Rev. P0
1
Publication Order Number:
NCN49597/D
NCN49597
APPLICATION
Application Example
C
8
R
8
R
7
R
6
C
6
VDDA
3V3_A
3V3_D
C
16
C
17
VDD
C
9
12V
12V
C
7
3V3_D
U
1
R
12
D
1
MAINS
6
VCC
−
B
7
12
Vuc
19
OutA
5
U
2
4
−
A
3
+A
T_REQ
R
10
D
2
C
10
OutB 8
9
10
VEE
11
1
Enable
13
NCS5650
2
Vcom
GNDuC
Vwarn
20
14
15
R
5
R
4
C
4
C
3
TX_OUT
TXD
RXD
BR0
+B
Appli
&
Metering
mC
Rlim
R
9
C
5
3V3_D
BR1
RESB
R
14
TX_ENB
C
11
NCN49597
PC201 11120 .1
Tr
1:2
R
2
D
3
D
4
R
3
C
2
C
1
RX_OUT
RX_IN
VDD1V8
3V3_A
R
1
REF_OUT
SEN
C
15
C
DREF
R
11
D
5
ZC_IN
EXT_CLK_E
XTAL_OUT
XTAL_I N
Y
1
C
13
C
14
Figure 1. Typical Application for the NCN49597S−FSK Modem
Figure 1 shows an S−FSK PLC modem build around
NCN49597. For synchronization the line frequency is
coupled in via a 1 MW resistor. The Schottky diode pair D
5
clamps the voltage within the input range of the zero cross
detector. In the receive path a 2
nd
order high pass filter
blocks the mains frequency. The corner point defined by C
1
,
C
2
, R
1
and R
2
is designed at 10 kHz. In the transmit path a
3
th
order low pass filter build around the NCS5650 power
operational amplifier suppresses the 2
nd
and 3
rd
harmonics
to be in line with the CENELEC EN 50065−1 specification.
The filter components are tuned for a space and mark
frequency of 63.3 and 74 kHz respectively. The output of the
amplifier is coupled via a DC blocking capacitor C
10
to a 2:1
pulse transformer Tr. The secondary of this transformer is
coupled to the mains via a high voltage capacitor C
11
. High
energetic transients from the mains are clamped by the
protection diode combination D
3
, D
4
together with D
1
, D
2
.
Because the mains is not galvanic isolated care needs to be
taken when interfacing to a microcontroller or a PC!
Table 1. EXTERNAL COMPONENTS LIST AND DESCRIPTION
Component
C
1
, C
2
C
5
, C
DREF
C
7
, C
9
, C
16
, C
17
C
3
C
4
C
6
C
8
C
10
Function
−
Remark
High pass receive filter
V
REF_OUT
; V
REF_OUT
decoupling cap
−
ceramic
Decoupling block capacitor
TX_OUT coupling capacitor
Low pass transmit filter
Low pass transmit filter
Low pass transmit filter
TX coupling cap; 1 A rms ripple @ 70 kHz
Typ Value
1.5
1
100
470
470
68
3
10
Tolerance
±10%
−20
+80%
−20
+80%
±20%
±10%
±10%
±10%
±20%
Unit
nF
mF
nF
nF
pF
pF
pF
mF
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VSSA
VSS
C
12
NCN49597
Table 1. EXTERNAL COMPONENTS LIST AND DESCRIPTION
Component
C
11
C
12
C
13
, C
14
C
15
R
1
R
2
R
3
, R
9
, R
12,
R
13
R
4
R
5
R
6
R
7
R
8
R
10
R
11
D
1
, D
2
D
3
, D
4
D
5
Y1
Tr
U1
U2
Function
−
Remark
High Voltage coupling capacitor; 630 V
Zero Cross noise suppression
X−tal load capacitor
Decoupling block capacitor 1.8 V internal supply
High pass receive filter
High pass receive filter
High pass receive filter; Alarm current ; Pull up
Low pass transmit filter
Low pass transmit filter
Low pass transmit filter
Low pass transmit filter
Low pass transmit filter
TX Coupling resistor ; 0.5 W
Zero Cross coupling HiV
High current Schottky Clamp diodes
TVS diodes
Double low current Schottky clamp diode
X−tal
2:1 Pulse transformer
PLC modem
Power Operational Amplifier
NCN49597
NCS5650
Typ Value
220
100
22
1
22
11
10
3,3
10
8,2
500
3
0,47
1
MBRA430
P6SMB6.8AT3G
BAS70−04
48 MHz
Tolerance
±20%
±20%
±20%
−20
+80%
±1%
±1%
±1%
±1%
±1%
±1%
±1%
±1%
±1%
±5%
Unit
nF
pF
pF
mF
kW
kW
kW
kW
kW
kW
W
kW
W
MW
Table 2. ABSOLUTE MAXIMUM RATINGS
Rating
ABSOLUTE MAXIMUM RATINGS SUPPLY
Power Supply Pins VDD, VDDA, VSS, VSSA
Absolute max. digital power supply
Absolute max. analog power supply
Absolute max. difference between digital and analog power supply
Absolute max. difference between digital and analog ground
V
DD_ABSM
V
DDA_ABSM
V
DD
−
V
DDA_ABSM
V
SS
−
V
SSA_ABSM
V
SS
−
0.3
V
SSA
−
0.3
−0.3
−0.3
3.9
3.9
0.3
0.3
V
V
V
V
Symbol
Min
Max
Unit
ABSOLUTE MAXIMUM RATINGS NON 5V SAFE PINS
Non 5V Safe Pins: TX_OUT, ALC_IN, RX_IN, RX_OUT, REF_OUT, ZC_IN, XIN, XOUT, TDO, TDI, TCK, TMS, TRSTB, TEST
Absolute maximum input for normal digital inputs and analog inputs
Absolute maximum voltage at any output pin
ABSOLUTE MAXIMUM RATINGS 5V SAFE PINS
5V Safe Pins: TX_ENB, TXD, RXD, BR0, BR1, IO3 .. IO11, RESB
Absolute maximum input for digital 5V safe inputs
Absolute maximum voltage at 5V safe output pin
V
5VS_ABSM
V
OUT5V_ABSM
V
SS
−
0.3
V
SS
−
0.3
6.0
3.9
V
V
V
IN_ABSM
V
OUT_ABSM
V
SS
−
0.3
V
SS
−
0.3
V
DD
+ 0.3
V
DD
+ 0.3
V
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
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NCN49597
Normal Operating Conditions
Operating ranges define the limits for functional operation and parametric characteristics of the device as described in the
Normal Operating Conditions section and for the reliability specifications as listed in Detailed Hardware Description section.
Functionality outside these limits is not implied.
Total cumulative dwell time outside the normal power supply voltage range or the ambient temperature under bias, must be
less than 0.1% of the useful life as defined in Detailed Hardware Description section.
Table 3. OPERATING RANGES
Rating
Power supply voltage range
Ambient Temperature
Extended Ambient Temperature on special request
Symbol
V
DD
T
A
T
A
Min
3.0
−25
−40
Max
3.6
80
80
Unit
V
°C
°C
PIN DESCRIPTION
QFN Packaging
NC
NC
TX_OUT
ALC_IN
NC
NC
VDDA
VSSA
RX_OUT
RX_IN
NC
REF_OUT
NC
52
51
50
49
48
47
46
45
44
43
42
41
40
M50Hz_IN
NC
IO3
IO4
IO5
IO0/RX_DATA
TDO
TDI
TCK
TMS
TRST
IO6
IO7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
39
38
37
36
35
AMIS49597
34
33
32
31
30
29
28
27
NC
NC
TX_EN
TEST
RES
IO11
CRC
BR0
BR1
SEN
T_REQ
CSB
SDO
Figure 2. QFN Pin−out of NCN49597 (Top view)
Table 4. NCN49597QFN PIN FUNCTION DESCRIPTION
Pin No.
1
3..5, 12..15,
23, 34
6
7
8
9
10
11
Pin Name
ZC_IN
IO3 .. IO11
RX_DATA
TDO
TDI
TCK
TMS
TRSTB
I/O
In
In/Out
Out
Out
In
In
In
In
Type
A
D, 5V Safe
D, 5V Safe
D, 5V Safe
D, 5V Safe
D, 5V Safe
D, 5V Safe
D, 5V Safe
Description
50/60 Hz input for mains zero cross detection
General Purpose I/O
Data reception indication (open drain output)
Test data output
Test data input (internal pull down)
Test clock (internal pull down)
Test mode select (internal pull down)
Test reset bar (internal pull down, active low)
SDI
SCK
RXD
IO10
TXD
VDD
VSS
VDD1V8
XOUT
XIN
TXD/PRES
IO9
IO8
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NCN49597
Table 4. NCN49597QFN PIN FUNCTION DESCRIPTION
Pin No.
16
17
18
19
20
21
22
24
25
26
27
28
29
30
31
32
33
35
36
37
42
43
46
47
48
49
51
2, 38..41, 44,
45,50, 52
Pin Name
TXD/PRES
XIN
XOUT
VDD1V8
VSS
VDD
TXD
RXD
SCK
SDI
SDO
CSB
T_REQ
SEN
BR1
BR0
CRC
RESB
TEST
TX_ENB
TX_OUT
ALC_IN
VDDA
VSSA
RX_OUT
RX_IN
REF_OUT
NC
Out
In
Out
Out
In
Out
In
Out
In
In
In
In
In
Out
In
In
Out
Out
In
I/O
Out
In
Out
Type
D, 5V Safe
A
A
P
P
P
D, 5V Safe
D, 5V Safe
D
D
D
D
D, 5V Safe
D
D, 5V Safe
D, 5V Safe
D, 5V Safe
D, 5V Safe
D
D, 5V Safe
A
A
P
P
A
A
A
Description
Output of transmitted data (TXD) or PRE_SLOT signal
(PRES)
Xtal input (can be driven by an internal clock)
Xtal output (output floating when XIN driven by external
clock)
1V8 regulator output. Foresee a decoupling capacitor
Digital ground
3.3V digital supply
SCI transmit output (open drain)
SCI receive input (Schmitt trigger output)
SPI interface external Flash
SPI interface external Flash
SPI interface external Flash
SPI interface external Flash
Transmit Request input
Boot option
SCI baud rate selection
SCI baud rate selection
Correct frame CRC indication (open drain output)
Master reset bar (Schmitt trigger input, active low)
Hardware Test enable (internal pull down)
TX enable bar (open drain)
Transmitter output
Automatic level control input
3.3V analog supply
Analog ground
Output of receiver low noise operational amplifier
Positive input of receiver low noise operational amplifier
Reference output for stabilization
Pins 2, 38..41, 44, 45, 50, 52 are not connected. These
pins need to be left open or connected to the GND plane.
P:
A:
D:
Power pin
Analog pin
Digital pin
5V Safe:
Out:
In:
IO that support the presence of 5V on bus line
Output signal
Input signal
Detailed Pin Description
VDDA
REF_OUT
VDDA is the positive analog supply pin. Nominal voltage
is 3.3 V. A ceramic decoupling capacitor C
DA
= 100 nF must
be placed between this pin and the VSSA. Connection path
of this capacitance to the VSSA on the PCB should be kept
as short as possible in order to minimize the serial resistance.
REF_OUT is the analog output pin which provides the
voltage reference used by the A/D converter. This pin must
be decoupled to the analog ground by a 1
mF
ceramic
capacitance C
DREF
. The connection path of this capacitor to
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