NTLUS3A39PZ
−20
V,
−5.2
A, Single P−Channel, ESD,
1.6x1.6x0.55 mm UDFN Package
Features
Power MOSFET
•
UDFN Package with Exposed Drain Pads for Excellent Thermal
Conduction
•
Low Profile UDFN 1.6 x 1.6 x 0.55 mm for Board Space Saving
•
Ultra Low R
DS(on)
•
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
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MOSFET
V
(BR)DSS
R
DS(on)
MAX
39 mW @
−4.5
V
−20
V
50 mW @
−2.5
V
81 mW @
−1.8
V
147 mW @
−1.5
V
−5.2
A
I
D
MAX
•
Optimized for Power Management Applications for Portable
Products, Such as Cell Phones, PMP, Media Tablets, DSC, GPS, and
Others
•
Battery Switch
•
High Side Load Switch
MAXIMUM RATINGS
(T
J
= 25°C unless otherwise stated)
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
Continuous Drain
Current (Note 1)
Continuous Drain
Current (Note 1)
Power Dissipa-
tion (Note 1)
Steady
State
t
≤
5s
Steady
State
t
≤
5s
Continuous Drain
Current (Note 2)
Steady
State
T
A
= 25°C
T
A
= 85°C
T
A
= 25°C
T
A
= 25°C
T
A
= 25°C
T
A
= 25°C
T
A
= 85°C
T
A
= 25°C
tp = 10
ms
P
D
I
DM
T
J
,
T
STG
I
S
T
L
I
D
P
D
Symbol
V
DSS
V
GS
I
D
Value
−20
±8.0
−5.2
−3.7
−6.4
1.5
2.3
−3.4
−2.4
0.6
−17
-55 to
150
−1
260
W
A
°C
A
°C
A
W
6
1
Unit
V
V
A
D
G
S
P−Channel MOSFET
MARKING DIAGRAM
UDFN6
CASE 517AU
1
AE MG
G
Power Dissipation (Note 2)
Pulsed Drain Current
Operating Junction and Storage
Temperature
AE = Specific Device Code
M = Date Code
G
= Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
Source Current (Body Diode) (Note 2)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. Surface Mounted on FR4 Board using 1 in sq pad size (Cu area = 1.127 in sq
[2 oz] including traces).
2. Surface-mounted on FR4 board using the minimum recommended pad size
of 30 mm
2
, 2 oz. Cu.
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information on page 5 of
this data sheet.
©
Semiconductor Components Industries, LLC, 2016
March, 2016
−
Rev. 2
1
Publication Order Number:
NTLUS3A39PZ/D
NTLUS3A39PZ
THERMAL RESISTANCE RATINGS
Parameter
Junction-to-Ambient – Steady State (Note 3)
Junction-to-Ambient – t
≤
5 s (Note 3)
Junction-to-Ambient – Steady State min Pad (Note 4)
3. Surface-mounted on FR4 board using 1 in sq pad size (Cu area = 1.127 in sq [2 oz] including traces).
4. Surface-mounted on FR4 board using the minimum recommended pad size of 30 mm
2
, 2 oz. Cu.
Symbol
R
θJA
R
θJA
R
θJA
Max
85
55
200
°C/W
Unit
ELECTRICAL CHARACTERISTICS
(T
J
= 25°C unless otherwise specified)
Parameter
OFF CHARACTERISTICS
Drain-to-Source Breakdown Voltage
Drain-to-Source Breakdown Voltage
Temperature Coefficient
Zero Gate Voltage Drain Current
Gate-to-Source Leakage Current
ON CHARACTERISTICS
(Note 5)
Gate Threshold Voltage
Negative Threshold Temp. Coefficient
Drain-to-Source On Resistance
V
GS(TH)
V
GS(TH)
/T
J
R
DS(on)
V
GS
=
−4.5
V, I
D
=
−4.0
A
V
GS
=
−2.5
V, I
D
=
−2.0
A
V
GS
=
−1.8
V, I
D
=
−1.2
A
V
GS
=
−1.5
V, I
D
=
−0.5
A
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Total Gate Charge
Threshold Gate Charge
Gate-to-Source Charge
Gate-to-Drain Charge
g
FS
C
ISS
C
OSS
C
RSS
Q
G(TOT)
Q
G(TH)
Q
GS
Q
GD
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
RR
t
a
t
b
Q
RR
V
GS
= 0 V, dis/dt = 100 A/ms,
I
S
=
−1.0
A
T
J
= 25°C
T
J
= 125°C
V
GS
=
−4.5
V, V
DD
=
−15
V,
I
D
=
−3.0
A, R
G
= 1
W
V
GS
=
−4.5
V, V
DS
=
−15
V;
I
D
=
−3.0
A
V
DS
=
−5
V, I
D
=
−3.0
A
CHARGES, CAPACITANCES & GATE RESISTANCE
920
V
GS
= 0 V, f = 1 MHz,
V
DS
=
−15
V
85
80
10.4
0.5
1.2
3.0
ns
nC
pF
V
GS
= V
DS
, I
D
=
−250
mA
−0.4
3.0
30
40
55
75
25
39
50
81
147
S
−1.0
V
mV/°C
mW
V
(BR)DSS
V
(BR)DSS
/T
J
I
DSS
I
GSS
V
GS
= 0 V, I
D
=
−250
mA
I
D
=
−250
mA,
ref to 25°C
V
GS
= 0 V,
V
DS
=
−20
V
T
J
= 25°C
−20
13
−1.0
±10
V
mV/°C
mA
mA
Symbol
Test Condition
Min
Typ
Max
Units
V
DS
= 0 V, V
GS
=
±8.0
V
SWITCHING CHARACTERISTICS, VGS = 4.5 V
(Note 6)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
DRAIN-SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
V
GS
= 0 V,
I
S
=
−1.0
A
0.67
0.56
11.1
5.8
5.3
4
nC
ns
1.0
V
7.2
12.2
34.7
34.8
5. Pulse Test: pulse width
≤
300
ms,
duty cycle
≤
2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
NTLUS3A39PZ
TYPICAL CHARACTERISTICS
20
18
−I
D
, DRAIN CURRENT (A)
16
14
12
10
8
6
4
2
0
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
V
GS
=
−2.5
V
−3.0
V
−4.5
to
−3.5
V
−2
V
−1.8
V
−I
D
, DRAIN CURRENT (A)
20
18
16
14
12
10
8
6
4
2
0
0.5
1
T
J
= 125°C
T
J
=
−55°C
T
J
= 25°C
V
DS
≤
−10
V
−1.5
V
1.5
2
2.5
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
−V
GS
, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
R
DS(on)
, DRAIN−TO−SOURCE RESISTANCE (W)
0.12
0.11
0.10
0.09
0.08
0.07
0.06
0.05
0.04
0.03
0.02
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
T
J
= 25°C
I
D
=
−4.0
A
0.120
Figure 2. Transfer Characteristics
−1.5
V
0.100
0.080
0.060
−1.8
V
T
J
= 25°C
−2.5
V
0.040
0.020
V
GS
=
−4.5
V
1
3
5
7
9
11
13
15
17
19
−V
GS
, GATE VOLTAGE (V)
−I
D
, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
1.6
R
DS(on)
, NORMALIZED DRAIN−TO−
SOURCE RESISTANCE (W)
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
50
25
0
25
50
75
100
T
J
, JUNCTION TEMPERATURE (°C)
125
150
100
V
GS
=
−4.5
V
I
D
=
−4.0
A
−I
DSS
, LEAKAGE (nA)
10000
100000
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
T
J
= 125°C
1000
T
J
= 85°C
2
4
6
8
10
12
14
16
18
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
20
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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3
NTLUS3A39PZ
TYPICAL CHARACTERISTICS
1800
1600
C, CAPACITANCE (pF)
1400
1200
1000
800
600
400
200
0
0
C
oss
C
rss
2
4
6
8
10
12
14
16
18
C
iss
V
GS
= 0 V
T
J
= 25°C
f = 1 MHz
−V
GS
, GATE−TO−SOURCE VOLTAGE (V)
5
Q
T
4
V
DS
3
2 Q
GS
1
0
Q
GD
V
DS
=
−15
V
I
D
=
−3.0
A
T
J
= 25°C
0
2
4
6
8
10
V
GS
18
15
12
9
6
3
0
12
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
20
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
Q
G
, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
1000.0
10.0
−I
S
, SOURCE CURRENT (A)
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
t, TIME (ns)
100.0
t
r
10.0
V
GS
=
−4.5
V
V
DD
=
−15
V
I
D
=
−3.0
A
1
10
t
d(off)
t
f
t
d(on)
1.0
T
J
= 125°C
T
J
= 25°C
T
J
=
−55°C
0.1
0.2
1.0
100
0.4
0.6
0.8
1.0
1.2
R
G
, GATE RESISTANCE (W)
−V
SD
, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
0.85
0.75
0.65
−I
D
, DRAIN CURRENT (A)
−V
GS(th)
(V)
0.55
0.45
0.35
0.25
0.15
50
25
0
25
50
75
100
125
T
J
, JUNCTION TEMPERATURE (°C)
I
D
=
−250
mA
10
100
Figure 10. Diode Forward Voltage vs. Current
10
ms
100
ms
1
0
≤
V
GS
≤
−8
V
Single Pulse
T
C
= 25°C
R
DS(on)
Limit
Thermal Limit
Package Limit
1 ms
10 ms
dc
0.1
0.01
0.1
150
1
10
−V
DS
, DRAIN−TO−SOURCE VOLTAGE (V)
100
Figure 11. Threshold Voltage
Figure 12. Maximum Rated Forward Biased
Safe Operating Area
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NTLUS3A39PZ
TYPICAL CHARACTERISTICS
R(t), EFFECTIVE TRANSIENT THERMAL RESPONSE
(°C/W)
90
80
70
60
50
40
30
20
10
0.2
0.1
0.05
0.02
0.01
Single Pulse
1E−05
1E−04
1E−03
1E−02
1E−01
t, TIME (s)
1E+00
1E+01
1E+02
1E+03
Duty Cycle = 0.5
R
qJA
= 85°C/W
0
1E−06
Figure 13. FET Thermal Response
DEVICE ORDERING INFORMATION
Device
NTLUS3A39PZTAG
NTLUS3A39PZTBG
Package
UDFN6
(Pb−Free)
UDFN6
(Pb−Free)
Shipping
†
3000 / Tape & Reel
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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