PCA6416A datasheet, PDF - EEWORLD Datasheet

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PCA6416A: DescriptionLow-voltage translating 16-bit I2C-bus/SMBus I/O expander; File Size3MB，42 Pages; ManufacturerNXP; Websitehttps://www.nxp.com

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PCA6416A Overview

Low-voltage translating 16-bit I2C-bus/SMBus I/O expander

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PCA6416A

Low-voltage translating 16-bit I

C-bus/SMBus I/O expander

with interrupt output, reset, and configuration registers

Rev. 1 — 11 September 2012

Product data sheet

1. General description

The PCA6416A is a 16-bit general purpose I/O expander that provides remote I/O

expansion for most microcontroller families via the I

C-bus interface.

NXP I/O expanders provide a simple solution when additional I/Os are needed while

keeping interconnections to a minimum, for example, in battery-powered mobile

applications for interfacing to sensors, push buttons, keypad, etc. In addition to providing

a flexible set of GPIOs, it simplifies interconnection of a processor running at one voltage

level to I/O devices operating at a different (usually higher) voltage level. The PCA6416A

has built-in level shifting feature that makes these devices extremely flexible in mixed

signal environments where communication between incompatible I/O voltages is required.

Its wide V

range of 1.65 V to 5.5 V on the dual power rail allows seamless

communications with next-generation low voltage microprocessors and microcontrollers

on the interface side (SDA/SCL) and peripherals at a higher voltage on the port side.

There are two supply voltages for PCA6416A: V

DD(I2C-bus)

and V

DD(P)

. V

DD(I2C-bus)

provides the supply voltage for the interface at the master side (for example, a

microcontroller) and the V

DD(P)

provides the supply for core circuits and Port P. The

bidirectional voltage level translation in the PCA6416A is provided through V

DD(I2C-bus)

should be connected to the V

of the external SCL/SDA lines. This indicates

the V

level of the I

C-bus to the PCA6416A. The voltage level on Port P of the

PCA6416A is determined by the V

DD(P)

The PCA6416A register set consists of four pairs of 8-bit Configuration, Input, Output, and

Polarity Inversion registers.

At power-on, the I/Os are configured as inputs. However, the system master can enable

the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for

each input or output is kept in the corresponding input or output register. The polarity of

the Input Port register can be inverted with the Polarity Inversion register, saving external

logic gates.

The system master can reset the PCA6416A in the event of a time-out or other improper

operation by asserting a LOW in the RESET input. The power-on reset puts the registers

in their default state and initializes the I

C-bus/SMBus state machine. The RESET pin

causes the same reset/initialization to occur without depowering the part.

The PCA6416A open-drain interrupt (INT) output is activated when any input state differs

from its corresponding Input Port register state and is used to indicate to the system

master that an input state has changed.

PCA6416A Related Products

	PCA6416A	PCA6416AEV	PCA6416AHF	PCA6416APW
Description	Low-voltage translating 16-bit I2C-bus/SMBus I/O expander	Low-voltage translating 16-bit I2C-bus/SMBus I/O expander	Low-voltage translating 16-bit I2C-bus/SMBus I/O expander	Low-voltage translating 16-bit I2C-bus/SMBus I/O expander
Is it Rohs certified?	-	conform to	conform to	conform to
Maker	-	NXP	NXP	NXP
package instruction	-	3 X 3 MM, 0.85 MM HEIGHT, PLASTIC, SOT1199-1, VFBGA-24	4 X 4 MM, 0.75 MM HEIGHT, PLASTIC, MO-220, SOT994-1, HWQFN-24	TSSOP,
Contacts	-	24	24	24
Reach Compliance Code	-	compli	compli	compli
JESD-30 code	-	S-PBGA-B24	S-PQCC-N24	R-PDSO-G24
length	-	3 mm	4 mm	7.8 mm
Humidity sensitivity level	-	1	1	1
Number of I/O lines	-	16	16	16
Number of ports	-	2	2	2
Number of terminals	-	24	24	24
Maximum operating temperature	-	85 °C	85 °C	85 °C
Minimum operating temperature	-	-40 °C	-40 °C	-40 °C
Package body material	-	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	-	VFBGA	HVQCCN	TSSOP
Package shape	-	SQUARE	SQUARE	RECTANGULAR
Package form	-	GRID ARRAY, VERY THIN PROFILE, FINE PITCH	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	-	260	260	260
Maximum seat height	-	1 mm	0.8 mm	1.1 mm
Maximum supply voltage	-	5.5 V	5.5 V	5.5 V
Minimum supply voltage	-	1.65 V	1.65 V	1.65 V
Nominal supply voltage	-	1.8 V	1.8 V	1.8 V
surface mount	-	YES	YES	YES
technology	-	CMOS	CMOS	CMOS
Temperature level	-	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal form	-	BALL	NO LEAD	GULL WING
Terminal pitch	-	0.5 mm	0.5 mm	0.65 mm
Terminal location	-	BOTTOM	QUAD	DUAL
Maximum time at peak reflow temperature	-	30	30	30
width	-	3 mm	4 mm	4.4 mm
uPs/uCs/peripheral integrated circuit type	-	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE	PARALLEL IO PORT, GENERAL PURPOSE

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