EEWORLDEEWORLDEEWORLD

Part Number

Search

IDT71V433S12PFI

Description
Cache SRAM, 32KX32, 12ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
Categorystorage    storage   
File Size260KB,19 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

IDT71V433S12PFI Overview

Cache SRAM, 32KX32, 12ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100

IDT71V433S12PFI Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeQFP
package instruction14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
Contacts100
Reach Compliance Codenot_compliant
ECCN code3A991.B.2.B
Maximum access time12 ns
I/O typeCOMMON
JESD-30 codeR-PQFP-G100
JESD-609 codee0
length20 mm
memory density1048576 bit
Memory IC TypeCACHE SRAM
memory width32
Humidity sensitivity level3
Number of functions1
Number of terminals100
word count32768 words
character code32000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize32KX32
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Encapsulate equivalent codeQFP100,.63X.87
Package shapeRECTANGULAR
Package formFLATPACK, LOW PROFILE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)240
power supply3.3 V
Certification statusNot Qualified
Maximum seat height1.6 mm
Maximum standby current0.015 A
Minimum standby current3.14 V
Maximum slew rate0.21 mA
Maximum supply voltage (Vsup)3.63 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationQUAD
Maximum time at peak reflow temperature20
width14 mm
32K x 32
3.3V Synchronous SRAM
Flow-Through Outputs
Features
32K x 32 memory configuration
Supports high performance system speed:
Commercial and Industrial:
— 11 11ns Clock-to-Data Access (50MHz)
— 12 12ns Clock-to-Data Access (50MHz)
LBO
input selects interleaved or linear burst mode
Self-timed write cycle with global write control (GW), byte
write enable (BWE), and byte writes (BWx)
Power down controlled by ZZ input
Single 3.3V power supply (+10/-5%)
Packaged in a JEDEC Standard 100-pin rectangular plastic
thin quad flatpack (TQFP).
IDT71V433
x
x
x
x
x
x
x
Description
The IDT71V433 is a 3.3V high-speed 1,048,576-bit SRAM orga-
nized as 32K x 32 with full support of various processor interfaces
including the Pentium™ and PowerPC™. The flow-through burst archi-
tecture provides cost-effective 2-1-1-1 performance for processors up to
50 MHz.
The IDT71V433 SRAM contains write, data-input, address and
control registers. There are no registers in the data output path (flow-
through architecture). Internal logic allows the SRAM to generate a
self-timed write based upon a decision which can be left until the
extreme end of the write cycle.
The burst mode feature offers the highest level of performance to
the system designer, as the IDT71V433 can provide four cycles of data
for a single address presented to the SRAM. An internal burst address
counter accepts the first cycle address from the processor, initiating the
access sequence. The first cycle of output data will flow-through from
the array after a clock-to-data access time delay from the rising clock
edge of the same cycle. If burst mode operation is selected (ADV=LOW),
the subsequent three cycles of output data will be available to the
user on the next three rising clock edges. The order of these three
addresses will be defined by the internal burst counter and the
LBO
input pin.
The IDT71V433 SRAM utilizes IDT's high-performance 3.3V
CMOS process, and is packaged in a JEDEC Standard 14mm x 20mm
100-pin thin plastic quad flatpack (TQFP).
Pin Description
A
0
–A
14
CE
CS
0
,
CS
1
OE
GW
BWE
BW
1
–BW
4
CLK
ADV
ADSC
ADSP
LBO
ZZ
I/O
0
–I/O
31
V
DD
, V
DDQ
V
SS
, V
SSQ
Address Inputs
Chip Enable
Chips Selects
Output Enable
Global Write Enable
Byte Write Enable
Individual Byte Write Selects
Clock Input
Burst Address Advance
Address Status (Cache Controller)
Address Status (Processor)
Linear / Interleaved Burst Order
Sleep Mode
Data Input/Output
Co re and I/O Power Supply (3.3V)
Array Ground, I/O Ground
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
Input
I/O
Power
Power
Synchronous
Synchronous
Synchronous
Asynchronous
Synchronous
Synchronous
Synchronous
N/A
Synchronous
Synchronous
Synchronous
DC
Asynchronous
Synchronous
N/A
N/A
3729 tbl 01
Pentium is a trademark of Intel Corp.
PowerPC is a trademark of International Business Machines, Inc.
AUGUST 2001
1
DSC-3729/04
©2000 Integrated Device Technology, Inc.

IDT71V433S12PFI Related Products

IDT71V433S12PFI IDT71V433S11PF IDT71V433S11PFI IDT71V433S12PF
Description Cache SRAM, 32KX32, 12ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100 Cache SRAM, 32KX32, 11ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100 Cache SRAM, 32KX32, 11ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100 Cache SRAM, 32KX32, 12ns, CMOS, PQFP100, 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
Is it Rohs certified? incompatible incompatible incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code QFP QFP QFP QFP
package instruction 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100 14 X 20 MM, 1.40 MM HEIGHT, PLASTIC, TQFP-100
Contacts 100 100 100 100
Reach Compliance Code not_compliant not_compliant not_compliant not_compliant
ECCN code 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B 3A991.B.2.B
Maximum access time 12 ns 11 ns 11 ns 12 ns
I/O type COMMON COMMON COMMON COMMON
JESD-30 code R-PQFP-G100 R-PQFP-G100 R-PQFP-G100 R-PQFP-G100
JESD-609 code e0 e0 e0 e0
length 20 mm 20 mm 20 mm 20 mm
memory density 1048576 bit 1048576 bit 1048576 bit 1048576 bit
Memory IC Type CACHE SRAM CACHE SRAM CACHE SRAM CACHE SRAM
memory width 32 32 32 32
Humidity sensitivity level 3 3 3 3
Number of functions 1 1 1 1
Number of terminals 100 100 100 100
word count 32768 words 32768 words 32768 words 32768 words
character code 32000 32000 32000 32000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 85 °C 70 °C 85 °C 70 °C
organize 32KX32 32KX32 32KX32 32KX32
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LQFP LQFP LQFP LQFP
Encapsulate equivalent code QFP100,.63X.87 QFP100,.63X.87 QFP100,.63X.87 QFP100,.63X.87
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL
Peak Reflow Temperature (Celsius) 240 240 240 240
power supply 3.3 V 3.3 V 3.3 V 3.3 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1.6 mm 1.6 mm 1.6 mm 1.6 mm
Maximum standby current 0.015 A 0.015 A 0.015 A 0.015 A
Minimum standby current 3.14 V 3.14 V 3.14 V 3.14 V
Maximum slew rate 0.21 mA 0.22 mA 0.22 mA 0.21 mA
Maximum supply voltage (Vsup) 3.63 V 3.63 V 3.63 V 3.63 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V 3.3 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL COMMERCIAL INDUSTRIAL COMMERCIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm 0.65 mm 0.65 mm
Terminal location QUAD QUAD QUAD QUAD
Maximum time at peak reflow temperature 20 20 20 20
width 14 mm 14 mm 14 mm 14 mm
Asking for help, transplanting ucosii to 2440, repeated restart problem
Question: I transplanted ucosii to mini2440, and it kept restarting when entering the initialization function: OSInit(). I traced it and found that it was reset and restarted when returning from the e...
xiaoma0430 Real-time operating system RTOS
Urgent, a newbie dares to ask the moderator for help! ! ! ! ! !
Recently, a super novice used the EM-STM3210C development board to debug the serial port USART module. The program is as follows. When using H-jtag simulation, open the memory observation window and r...
cfly stm32/stm8
What is the reason why programs available under nfs are not available under cramfs?
I used a 2410 development board, transplanted bluez Bluetooth to it, inserted a USB Bluetooth and used nfs to test the Bluetooth program. I could send 3MB of data in a loop (using the simulated serial...
entertest Embedded System
Don’t worry, what should I do if the Start Guide content does not comply after conversion?
Convert pdf to TXT using Adobe software, Start Guide Contents What to do if the conversion is not in compliance?Does anyone have a good solution for steps 1-5 ?...
ppiicc Microcontroller MCU
Discussion on ZigBee Wireless Communication Technology and Its Application
[size=3px]Discussion on ZigBee wireless communication technology and its application. What is missing is the caj file. Please pay attention when downloading it~~ [/size]...
xtss RF/Wirelessly
Precision Op Amp Data
AD series OP07, etc., share with you...
quanzx Analog electronics

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 282  334  1679  1139  2715  6  7  34  23  55 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号