UNISONIC TECHNOLOGIES CO., LTD
UB264A
Preliminary
CMOS IC
LION BATTERY PROTECTION
IC FOR 2-SERIAL, 3-SERIAL,
OR 4-SERIAL-CELL PACK
(SECONDARY PROTECTION)
DESCRIPTION
The UTC
UB264A
Series is secondary protection IC for 2-, 3-, or
4-Cell lithium-ion rechargeable battery packs, and incorporates a
high-accuracy voltage detection circuit.
The UTC
UB264A
Series also includes a high accuracy delay
circuit for over voltage detection time without external capacitors.
FEATURES
*
*
*
*
*
*
*
*
*
High-accuracy voltage detection circuit for each cell
Overcharge detection voltage n (n=1 to 4): 4.30V to 4.80V (in
50mV steps)
Overcharge hysteresis voltage n (n=1 to 4): -0.52V±0.21V,
−0.39V±0.16V, −0.26V±0.11V, −0.13V±0.06V,
None
Delay times for overcharge detection can be set by an internal
circuit without external capacitors
Output control function via CTL pin
CMOS output active “H”
Wide operating voltage range 3.6V to 24V
Wide operating temperature range
−40°C
~ +85°C
Low current consumption: 2.5μA typ. (+25°C) at 3.5V for each
cell
ORDERING INFORMATION
Ordering Number
Lead Free
Halogen Free
UB264AL-P08-R
UB264AG-P08-R
xx: SERIAL CODE, refer SERIAL CODE LIST.
Package
TSSOP-8
Packing
Tape Reel
Note:
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UB264A
PIN CONFIGURATION
Preliminary
CMOS IC
PIN DESCRIPTION
PIN NO.
1
2
3
4
5
6
7
8
PIN NAME
DESCRIPTION
V
DD
Positive power input pin
SENSE
Positive voltage connection pin of battery 1
Negative voltage connection pin of battery 1
VC1
Positive voltage connection pin of battery 2
Negative voltage connection pin of battery 2
VC2
Positive voltage connection pin of battery 3
Negative voltage connection pin of battery 3
VC3
Positive voltage connection pin of battery 4
Negative power input pin
V
SS
Negative voltage connection pin of battery 4
CTL
CO output control pin
CO
FET gate connection pin for charge
SERIAL CODE LIST
OVERCHARGE
DETECTION
VOLTAGE
[V
CU
](V)
4.45±0.050
4.35±0.050
4.50±0.050
4.35±0.050
4.30±0.050
4.45±0.050
4.30±0.050
4.40±0.050
OVERCHARGE
HYSTERSIS
VOLTAGE
[V
HC
](V)
-0.39±0.16
-0.39±0.16
-0.39±0.16
-0.39±0.16
-0.39±0.16
-0.39±0.16
-0.39±0.16
-0.39±0.16
OVERCHARGE
DETECTION
DELAY TIME
[t
CU
](S)
4.0±1.0
4.0±1.0
4.0±1.0
2.0±0.5
4.0±1.0
2.0±0.5
2.0±0.5
4.0±1.0
OVERCHARGE
RELEASE
DELAY TIME
[t
CL
](mS)
60.0±20.0
60.0±20.0
60.0±20.0
30.0±10.0
60.0±20.0
30.0±10.0
30.0±10.0
60.0±20.0
OUTPUT
FORM
CMOS output
active “H”
CMOS output
active “H”
CMOS output
active “H”
CMOS output
active “H”
CMOS output
active “H”
CMOS output
active “H”
CMOS output
active “H”
CMOS output
active “H”
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MODEL
CODE
AA
AB
AC
AD
UB264A
AE
AF
AG
AH
UNISONIC TECHNOLOGIES CO., LTD
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UB264A
BLOCK DIAGRAM
SENSE
Preliminary
CMOS IC
Oscillator
Overcharge
Detector 1
V
DD
VC1
VC2
Overcharge
Detector 2
Divider
CO
VC3
Overcharge
Detector 3
Control
Logic
Overcharge
Detector 4
CTL
V
SS
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UB264A
Preliminary
CMOS IC
ABSOLUTE MAXIMUM RATING
(T
A
=25°C, unless otherwise specified)
PARAMETER
SYMBOL
RATINGS
UNIT
Input Voltage Between V
DD
And V
SS
V
DS
V
SS
−0.3
~ V
SS
+26
V
Input Pin Voltage
V
IN
V
SS
−0.3
~ V
DD
+0.3
V
CO Output Pin Voltage
V
CO
V
SS
−0.3
~ V
DD
+0.3
V
Power Dissipation (Note 2)
P
D
650
mW
Operation Ambient Temperature
T
OPR
−40
~ +85
°C
Storage Temperature
T
STG
−40
~ +125
°C
Notes: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. When mounted on printed circuit board.
ELECTRICAL CHARACTERISTICS
(T
A
=25°C, unless otherwise specified)
PARAMETER
DETECTION VOLTAGE
Overcharge Detection
Voltage n (n=1, 2, 3, 4)
Overcharge Hysteresis
Voltage n (n=1, 2, 3, 4)
DELAY TIME
Overcharge Detection Delay
Time
Overcharge Release Delay
Time
Overcharge Timer Reset
Delay Time
Transition Time To Test
Mode (Note 1)
CTL Pin Response Time
INPUT VOLTAGE
Operating Voltage Between
V
DD
And V
SS
CTL Input “H” Voltage
CTL Input “L” Voltage
SYMBOL
V
CUn
V
HCn
TEST CONDITIONS
4.30 ~ 4.80 V, adjustable
V
HCn
=−0.52±0.21V,
−0.39±0.16V,
−0.26
±0.11V,
−0.13
±0.06V, None
3.0
1.5
40
20
10
5
40
20
MIN
V
CUn
−
0.050
TYP
V
CUn
V
HCn
4.0
2.0
60
30
15
7.5
60
30
5.0
2.5
80
40
20
10
80
40
3.0
24
MAX
V
CUn
+
0.050
UNIT
V
V
t
CU
t
CL
t
TR
t
TST
t
CTL
V
DSOP
V
CTLH
V
CTLL
For AD, AF and AG products
For AD, AF and AG products
For AD, AF and AG products
For AD, AF and AG products
s
ms
ms
ms
ms
V
V
3.6
V
DD
×
0.95
V
DD
×
0.4
2.5
2.0
-0.5
-0.5
-0.5
1.0
-0.1
0.4
20
1.5
0
0
0
1.5
10
10
6.0
0.5
0.5
0.5
2.0
V
INPUT CURRENT
Current Consumption During
I
OPE
V1=V2=V3=V4=3.5V
Operation
Current Consumption During
I
OPED
V1=V2=V3=V4=2.3V
Overdischarge
SENSE Pin Current
I
SENSE
V1=V2=V3=V4=3.5V
VC1 Pin Current
I
VC1
V1=V2=V3=V4=3.5V
VC2 Pin Current
I
VC2
V1=V2=V3=V4=3.5V
VC3 Pin Current
I
VC3
V1=V2=V3=V4=3.5 V
CTL Pin “H” Current
I
CTLH
V1=V2=V3=V4=3.5 V, V
CTL
=V
DD
CTL Pin “L” Current
I
CTLL
V1=V2=V3=V4=3.5 V, V
CTL
=0 V
OUTPUT CURRENT
CO Pin Sink Current
I
COL
V
COP
=V
SS
+0.5V
CO Pin Source Current
I
COH
V
COP
=V
DD
−0.5V
Note: 1. Test conditions: V1=V2=V3=V4=3.5V, V
DD
≥
V
SENSE
+8.5V.
μA
μA
μA
μA
μA
μA
μA
μA
mA
μA
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QW-R502-832.A
UB264A
OPERATING
Preliminary
CMOS IC
1. Overcharge Detection
Under normal conditions, when the voltage of any one cell battery exceeds the overcharge detection voltage (V
CU
)
during charging, and after the state is retained for the overcharge detection delay time (t
CU
), CO will become “H”.
This state is called overcharge. Attaching FET to the CO pin provides charge control and a second protection.
Only the voltages of all the batteries decreases below the total of the overcharge detection voltage (V
CU
) and the
overcharge hysteresis voltage (V
HC
), and the state is retained for the overcharge release delay time (t
CL
) or longer,
CO will become “L”.
2. Overcharge Timer Reset
When an overcharge release noise that forces the voltage of the battery temporarily below the overcharge
detection voltage (V
CU
) is input during the overcharge detection delay time (t
CU
) from when V
CU
is exceeded to when
charging is stopped, t
CU
is continuously counted if the time the overcharge release noise persists is shorter than the
overcharge timer reset delay time (t
TR
). Under the same conditions, if the time the overcharge release noise persists
is t
TR
or longer, counting of t
CU
is reset once. After that, when V
CU
has been exceeded, counting t
CU
resumes.
3. CTL Pin
The CTL pin is used to control the output voltage of the CO pin. In the UTC
UB264A
Series, the CTL pin takes
precedence over the overcharge detection circuit.
CTL PIN
CO PIN
“H”
Normal state (Note 1)
Open
“H”
“L”
“H”
“L”→ “H”
-
“H”
→“L”
-
1. The state is controlled by the overcharge detection circuit.
Note:
Notes:
1.
2.
The reverse voltage “H” to “L” or “L” to “H” of CTL pin is V
DD
pin voltage
−2.8V
(Typ.), does not have
the hysteresis.
Since the CTL pin implements high resistance of 8MΩ to 12MΩ for pull down, be careful of external
noise application. If an external noise is applied, CO may become “H”. Perform thorough evaluation
using the actual application.
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