M200 datasheet, PDF - EEWORLD Datasheet

M200: DescriptionTwo-PLL Programmable Clock Generator for Portable Applications; File Size358KB，17 Pages; ManufacturerCypress Semiconductor

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M200 Overview

Two-PLL Programmable Clock Generator for Portable Applications

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MoBL

Clock

M200/M500

Two-PLL Programmable Clock Generator

for Portable Applications

Two-PLL Programmable Clock Generator for Portable Applications

Features

■

Benefits

■

Device Operating Voltage Options:

❐

MoBL Clock M200 Family: 1.8 V

❐

MoBL Clock M500 Family: 2.5 V, 3.0 V, or 3.3 V

Selectable clock output voltages for both MoBL Clock M200

and M500:

❐

1.5 V, 1.8 V, 2.5 V, 3.0 V, or 3.3 V

Fully integrated ultra low power phase-locked loops (PLLs)

Input reference clock frequency range: 1–48 MHz

Output clock frequency range: 3–50 MHz

Three

C™

programmable output clocks

Programmable output drive strengths

150 ps typical cycle-to-cycle jitter

Optional Spread Spectrum for EMI reduction

16-pin (3 × 3 × 0.6 mm) QFN Package

Industrial temperature range

Suitable for cell phone, portable, and consumer electronics

applications

Multiple high-performance PLLs allow synthesis of unrelated

frequencies

Application compatibility in multiple output voltage levels

Optional Spread Spectrum capable PLLs with Lexmark or

Linear profile for maximum EMI reduction

PLLs can be programmed for system frequency margin tests

Meets critical timing requirements in complex system

designs

Individually enable or disable each output using I

Ease of output clock selection using programmable crossbar

switches

■

Logic Block Diagram

VDD_CLK1

VDD_CLK2

VDD_CLK3

EXCLKIN

REF SEL

Crossbar

Switch

Output

Dividers

and

PLL2

(SS)

Drive

Strength

Control

CLK1

PLL1

MUX

and

Control

Logic

CLK2

CLK3

SCL

SDA

PD#/OE

I2C

Cypress Semiconductor Corporation

Document Number: 001-29139 Rev. *C

•

198 Champion Court

•

San Jose

CA 95134-1709

•

408-943-2600

Revised November 25, 2010

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