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5962G0420102QYA

Description
Line Receiver, 4 Func, 4 Rcvr, CMOS, CDFP16, CERAMIC, DFP-16
CategoryAnalog mixed-signal IC    Drivers and interfaces   
File Size99KB,11 Pages
ManufacturerCobham Semiconductor Solutions
Download Datasheet Parametric View All

5962G0420102QYA Overview

Line Receiver, 4 Func, 4 Rcvr, CMOS, CDFP16, CERAMIC, DFP-16

5962G0420102QYA Parametric

Parameter NameAttribute value
MakerCobham Semiconductor Solutions
Parts packaging codeDFP
package instructionDFP,
Contacts16
Reach Compliance Codeunknown
ECCN code3A001.A.1.A
Differential outputNO
Input propertiesDIFFERENTIAL
Interface integrated circuit typeLINE RECEIVER
Interface standardsEIA-644; TIA-644
JESD-30 codeR-CDFP-F16
JESD-609 codee0
Number of functions4
Number of terminals16
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeDFP
Package shapeRECTANGULAR
Package formFLATPACK
Certification statusNot Qualified
Maximum receive delay3.3 ns
Number of receiver bits4
Filter levelMIL-PRF-38535 Class Q
Maximum seat height2.921 mm
Maximum supply voltage3.6 V
Minimum supply voltage3 V
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTIN LEAD
Terminal formFLAT
Terminal pitch1.27 mm
Terminal locationDUAL
total dose500k Rad(Si) V
width6.731 mm
Standard Products
UT54LVDS032LVT Low Voltage Quad Receiver with
Integrated Termination Resistor
Data Sheet
September, 2012
www.aeroflex.com/lvds
FEATURES
>400.0 Mbps (200 MHz) switching rates
+340mV differential signaling
3.3 V power supply
TTL compatible outputs
Cold spare all pins
Nominal 100Integrated Termination Resistor
3.3ns maximum propagation delay
0.35ns maximum differential skew
Operational; total dose irradiation testing to MIL-STD-883
Method 1019
- Total-dose: 300 krad(Si) and 1Mrad(Si)
- Latchup immune (LET > 100 MeV-cm
2
/mg)
Packaging options:
- 16-lead flatpack (dual in-line)
Standard Microcircuit Drawing 5962-04201
- QML Q and V compliant part
Compatible with IEEE 1596.3SCI LVDS
Compatible with ANSI/TIA/EIA 644-1996 LVDS Standard
INTRODUCTION
The UT54LVDS032LVT with internal 100Integrated
Termination Resistor Quad Receiver is a quad CMOS
differential line receiver designed for applications requiring
ultra low power dissipation and high data rates. The device is
designed to support data rates in excess of 400.0 Mbps (200
MHz) utilizing Low Voltage Differential Signaling (LVDS)
technology.
The UT54LVDS032LVT accepts low voltage (340mV)
differential input signals and translates them to 3V TTL output
levels. The receiver supports a three-state function that may be
used to multiplex outputs. The receiver also supports OPEN,
shorted and terminated (100
)
input fail-safe. Receiver output
will be HIGH for all fail-safe conditions.
All pins have Cold Spare buffers. These buffers will be high
impedance when V
DD
is tied to V
SS
.
An integrated termination resistor will reduce component count
and save board space.
R
IN1+
R
IN1-
+
R1
-
R
OUT1
R
IN2+
R
IN2-
+
R2
-
R
OUT2
R
IN3+
R
IN3-
+
R3
-
R
OUT3
R
IN4+
R
IN4-
EN
EN
+
R4
-
R
OUT4
Figure 1. UT54LVDS032LV Quad Receiver Block Diagram
1
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