530RB1045M00DG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> oscillator> 530RB1045M00DG

530RB1045M00DG: DescriptionLVPECL Output Clock Oscillator, 1045MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530RB1045M00DG Overview

LVPECL Output Clock Oscillator, 1045MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530RB1045M00DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	1045 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVPECL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

NJM2178 application circuit

Frequency-voltage conversion circuit

Lithium battery charger circuit

Negative voltage slope fast charger circuit

9V zero impedance voltage regulator circuit

Computer motherboard circuit diagram 440LX_20

STM32F767 FMC drives TFT screen and successfully transplants EMWIN (record): [i=s] This post was last edited by ihalin on 2016-8-12 00:19 [/i][size=3] After a while of thinking about using fmc to drive the screen with stm32F767, I found that it was always unsuccessful. Later, ...; ihalin stm32/stm8

Let's take a look at the various filter circuits in the circuit.: [i=s]This post was last edited by qwqwqw2088 on 2018-7-13 09:19[/i] [size=4][b]1. Common low-pass filter circuits[/b] L first-order filter C first-order filter CL second-order filter RC second-order f...; qwqwqw2088 Analogue and Mixed Signal

An error occurred during makeimg and packaging failed. How can I solve this problem?: An application configuration file SL50FBgb.mnu was packaged into the kernel, and the following line was added to platform.bib: SL50FBgb.mnu $(_FLATRELEASEDIR)\SL50FBgb.mnu NK U Then select Build Curre...; lczzn2008 Embedded System

"Playing with the board" + Yu Zhennan's STM32 development board experiment 3: This content is originally created by EEWORLD forum user chenbingjy . If you want to reprint or use it for commercial purposes, you must obtain the author's consent and indicate the source. Chapter 7 ...; chenbingjy Special Edition for Assessment Centres

How to use the Tools --> Windows CE Remote Call Profiler tool on CEPB (5.0)?: How to use Tools --> Windows CE Remote Call Profiler on CEPB (5.0)? (I want to use it to see the resources consumed by the program written by EVC on the development board) After launching --> the prog...; orangepk Embedded System

Golden pig announces good news, happy pig brings blessings, lucky pig brings auspiciousness, auspicious pig welcomes good fortune, auspicious pig celebrates the spring (New Year's greetings): Golden Pig New Year, joy and auspiciousness; Golden Pig arches the door, five blessings come; Golden Pig rolls, wealth rolls in; Golden Pig grows fat, climbs step by step; Golden Pig fills the circle,...; liaorentai Embedded System

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components