EEWORLDEEWORLDEEWORLD

Part Number

Search

531EC683M000DGR

Description
LVPECL Output Clock Oscillator, 683MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

531EC683M000DGR Overview

LVPECL Output Clock Oscillator, 683MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531EC683M000DGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Reach Compliance Codeunknown
Other featuresTAPE AND REEL
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability7%
JESD-609 codee4
Manufacturer's serial number531
Installation featuresSURFACE MOUNT
Nominal operating frequency683 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVPECL
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage2.75 V
Minimum supply voltage2.25 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
Description of the protection level of RFID tags
[align=left][color=black][font=宋体] [/font][/color][/align][align=left]For users, IP protection level is an important indicator of RFID equipment security protection. If you want to do your work well, ...
czgaotek2017 Industrial Control Electronics
[Help for beginners] Questions about the decimal adding counter~
[b][color=blue]First program~[/color][/b]:congratulate: LIBRARY IEEE; USE IEEE.STD_LOGIC_1164.ALL; USE IEEE.STD_LOGIC_UNSIGNED.ALL; ENTITY CNT10 IS PORT(CLK,RST,EN :IN STD_LOGIC; CQ:OUT STD_LOGIC_VECT...
blue_bm FPGA/CPLD
【CN0029】Using DAC to achieve 8-16 channel programmable voltage and excellent temperature drift performance
Circuit Function and AdvantagesThis circuit is a multichannel DAC configuration with excellent temperature drift performance. It utilizes the AD5390/AD5391/AD5392 to provide 8 to 16 DAC channels and 1...
EEWORLD社区 ADI Reference Circuit
PyCorder with capacitive touch matrix
PyCorder with Capacitive Touch Matrix Running CircuitPython...
dcexpert MicroPython Open Source section
MCU Optimization
The company's project requires MCU firmware OTA (this part needs to be optimized), MCU~external module control and uart communication interface debugging, MCU GPIO setting optimization, uCOS/bootloade...
chip5200 stm32/stm8
Building a dedicated subway card for hardware engineers
The subway cards in Shenyang are all in the shape of bank cards. Because I use them frequently, I am used to putting them in my back pocket. After a long time, they will crack, and the coil will break...
littleshrimp Talking

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 889  1182  2687  2676  2648  18  24  55  54  8 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号