EEWORLDEEWORLDEEWORLD

Part Number

Search

530DA939M000DG

Description
CMOS/TTL Output Clock Oscillator, 939MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

530DA939M000DG Overview

CMOS/TTL Output Clock Oscillator, 939MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530DA939M000DG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Reach Compliance Codeunknown
Other featuresTRAY
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability50%
JESD-609 codee4
Manufacturer's serial number530
Installation featuresSURFACE MOUNT
Nominal operating frequency939 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeCMOS/TTL
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
The IO of the entire Bank does not work
I use Altera FPGA, and now one of the IO banks is not working. The core voltage and VCCIO are both OK. Several IO ports of this bank are connected to LED lights, but none of them light up when the IO ...
zsk1024 FPGA/CPLD
10,000 yuan instrument for 8 yuan | The third Keysight Technology Double 11 instrument flash sale event is here as scheduled
[align=center][font=微软雅黑][size=3][color=#ff0000][font=微软雅黑][size=3][color=#ff0000]How do you plan to spend this year's Double 11? [/color][/size][/font][/color][/size][/font][/align][font=微软雅黑][size=3...
eric_wang Talking
What is the difference between the embedded topic of Intel Electronic Design Competition and the national electronic design competition?
[i=s]This post was last edited by paulhyde on 2014-9-15 09:37[/i] The question is the same as above. I would like to ask experts who have participated in Intel Electronic Design Competition to give me...
涯客 Electronics Design Contest
Recruitment: Ningbo listed auto parts company - motor control software development engineer
Recruiting motor control software development engineers Salary range: 15-25K/month before tax*14 Job Responsibilities: 1. Responsible for the development of brushless DC motor controller software and ...
Rena.zou Motor Drive Control(Motor Control)
LPC1500 experience + a super fun USB keyboard made with NXP LPC1549
[i=s]This post was last edited by littleshrimp on 2014-9-12 15:33[/i] [align=center][size=6][font=宋体]A super fun[/font]USB[font=宋体]keyboard made using[/font]NXP LPC1549[font=宋体][/font][/size][/align][...
littleshrimp NXP MCU
Clock: The last thing, and probably the hardest to solve
[align=left][color=#000]When designing a system, clocks are likely to be the last thing you consider. If you don't consider clocking schemes early, you are likely to overlook them, unless you are desi...
EEWORLD社区 Analogue and Mixed Signal

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2919  600  2192  2859  269  59  13  45  58  6 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号