531SC859M000DG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> oscillator> 531SC859M000DG

531SC859M000DG: DescriptionLVDS Output Clock Oscillator, 859MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531SC859M000DG Overview

LVDS Output Clock Oscillator, 859MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531SC859M000DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Other features	TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	7%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	859 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Infrared remote control relay circuit a

Ultra-small preamplifier circuit with very small input capacitance

Homemade USB port ISP (2313 simulated USB)

Separately excited switching regulated power supply circuit three

Two-channel volume remote control potentiometer

Computer motherboard circuit diagram 810 1_17

Do you know about solar controller MPPT?: I feel that I don't have a clear understanding of the principle of MPPT circuit and the characteristics of solar panels. I regard it as a constant voltage source plus internal resistance, and simulate...; 零下12度半 Energy Infrastructure?

Using TI-RTOS to implement UDP communication between two TM4C1294 ARM chips in CCS fails: I want to implement UDP communication between two TM4C1294 chips, but it always fails. I use CCS on TI-RTOS, and the ARM and computer can communicate normally. I have written two programs, client and ...; wjj Microcontroller MCU

Look at this matrix keyboard scanning. It's a bit hard to understand.: #include #define uint unsigned int #define uchar unsigned char uchar code tab[]={0xee,0xed,0xeb,0xe7,0xde,0xdd,0xdb,0xd7,0xbe,0xbd,0xbb,0xb7,0x7e,0x7d,0x7b,0x77,}; uchar code tab1[]={0x88,0Xbe,0Xc4,0X...; cf2928 MCU

SIdView Embedded Linux Integrated Development Environment: Author: Xi'an Jianhua Technology Industry Co., Ltd. After years of research and development, Jianhua Technology has successfully launched the SldView embedded Linux integrated development environment....; fighting Linux and Android

Introduction to div+css layout: This is an article I saw on the web designer website. It is very suitable for people who are new to div+css layout. I copied it and saved it. Hoho~~ Are you learning CSS layout? Are you still unable t...; mdsfnsa Embedded System

A novice needs help. I should finish the simulation program first and then ask the teacher for the device.: Dear experts: I have just started to learn microcontrollers. What I need to do is a data acquisition system based on AT89C52 and ADS1211. Now the hardware platform has been built, but the teacher aske...; doob Embedded System

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components