EEWORLDEEWORLDEEWORLD

Part Number

Search

530TC101M000DG

Description
CMOS Output Clock Oscillator, 101MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

530TC101M000DG Overview

CMOS Output Clock Oscillator, 101MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530TC101M000DG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Reach Compliance Codeunknown
Other featuresTRAY
Frequency Adjustment - MechanicalNO
frequency stability7%
JESD-609 codee4
Manufacturer's serial number530
Installation featuresSURFACE MOUNT
Nominal operating frequency101 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeCMOS
physical size7.0mm x 5.0mm x 1.85mm
Maximum supply voltage2.75 V
Minimum supply voltage2.25 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
Homemade small bench drill
Waste utilization again...
ZYXWVU Creative Market
[Design Q&A] Using Zero-Drift Amplifiers to Achieve High-Precision System Design
What is a zero-drift amplifier? What are the common applications of zero-drift amplifiers? Why are zero-drift amplifiers often used in low-frequency sensor signal conditioning systems? ……? >>...
nmg ADI Reference Circuit
A quick question about ARM?
In ARM, you can use MAP to define the first address of a structured memory table, and use FIELD to define the data fields in the structured memory table. However, MAP and FIELD only define data struct...
DBSSAM Embedded System
LM3S8962CAN clock problem
I would like to ask you, if the crystal oscillator uses 8M, PLL10 division is enabled, the processor clock is 20M, then at this time the clock of the CAN module should be 8M or 20M? I have just starte...
ZHANGXUEJIE Microcontroller MCU
Are ACC, PSW, PC, and special function registers in the CPU or in RAM?
Are ACC, PSW, PC, and special function registers in the CPU or in RAM? ? In theory, the definition of registers clearly states that they are caches in the CPU. If you look at the MSP430 manual, it is ...
zca123 51mcu
Underflow interrupt
(2407)The timer is working in continuous increase and decrease mode, but the underflow interrupt cannot be triggered?I searched for previous postsand found that it said that underflow interrupt cannot...
ruohanlee Analogue and Mixed Signal

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 815  1248  2001  2838  842  17  26  41  58  38 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号