530HB1276M00DG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> oscillator> 530HB1276M00DG

530HB1276M00DG: DescriptionCMOS/TTL Output Clock Oscillator, 1276MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530HB1276M00DG Overview

CMOS/TTL Output Clock Oscillator, 1276MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530HB1276M00DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Other features	TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	1276 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	CMOS/TTL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Applied to the design of photoelectric conversion circuit for household curtains

Sub-ultrasonic remote control light switch circuit (2)

Delay light circuit using relay (1)

Common Mode Range 100V Instrumentation Amplifier Circuit Diagram

DC motor forward and reverse control circuit diagram

Human body controlled electric fan circuit

How to deal with a single signal line crossing a clock domain?: [i=s]This post was last edited by Bai Ding on 2016-2-7 17:42[/i] Reposted from [url=http://www.21ic.com/mcucourse/201601/661616.htm]http://www.21ic.com/mcucourse/201601/661616.htm[/url] Over the past ...; 白丁 FPGA/CPLD

DM648 self-starting problem caused by CMD file under CCS5.2: I used to use CCS3.3, because the software was too prone to blue screens and crashes, and using a virtual machine seriously affected the speed of the emulator. So I switched to CCS5.2.The ECLIPS archi...; 灞波儿奔 Microcontroller MCU

A small question about the 15-year-old wind pendulum: Where should the mpu6050 be placed? What are the differences between the results measured in different places? The purpose of solving the above problems is to obtain a more accurate pendulum deflectio...; Jorring Electronics Design Contest

Is there any limit on array size in Windows Mobile?: I use C++ to create an array, char mmsContent[65535]; memset(mmsContent, 0, sizeof(mmsContent)); but the program will exit when it reaches the array declaration. It also doesn't work to create it in t...; 二战幸存者 Embedded System

GPIO driver function---GPIOPadConfigSet: GPIOPadConfigSet: Set the pin output drive current or the pull-up or pull-down resistance configuration when used as an input. Function prototype: void GPIOPadConfigSet(unsigned long ulPort, unsigned ...; eeleader Microcontroller MCU

How to convert digital signal into 4-20MA analog signal: I need to make a counter (4 decimal digits) and convert the digital signal into a 4-20mA analog signal for DCS to read. Please tell me how to implement it and the circuit diagram. (Please forgive me f...; xfzj1314 Embedded System

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components