EEWORLDEEWORLDEEWORLD

Part Number

Search

5G62D-80M-FREQ

Description
HCMOS/TTL Output Clock Oscillator, 0.625MHz Min, 50MHz Max, ROHS COMPLIANT, MINIATURE, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size112KB,1 Pages
ManufacturerEuroquartz
Websitehttp://www.euroquartz.co.uk/
Environmental Compliance  
Download Datasheet Parametric View All

5G62D-80M-FREQ Overview

HCMOS/TTL Output Clock Oscillator, 0.625MHz Min, 50MHz Max, ROHS COMPLIANT, MINIATURE, SMD, 6 PIN

5G62D-80M-FREQ Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerEuroquartz
Reach Compliance Codecompliant
Other featuresTRI-STATE FUNCTION
Maximum control voltage4.5 V
Minimum control voltage0.5 V
maximum descent time0.7 ns
Frequency Adjustment - MechanicalNO
Frequency offset/pull rate80 ppm
frequency stability25%
linearity10%
Installation featuresSURFACE MOUNT
Maximum operating frequency50 MHz
Minimum operating frequency0.625 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeHCMOS/TTL
Output load2 TTL, 15 pF
physical size11.4mm x 9.6mm x 2.5mm
longest rise time0.7 ns
Maximum supply voltage5.25 V
Minimum supply voltage4.75 V
Nominal supply voltage5 V
surface mountYES
maximum symmetry55/45 %
EURO
QUARTZ
CMOS SMD 11.4 x 9.6 x 2.5mm, 6 pad
Frequency range 0.625MHz to 50.0MHz
CMOS/TTL Output
Supply Voltage 5.0 V or 3.3 VDC
Integrated Phase Jitter 1ps typical
Low cost unit
DESCRIPTION
G62 VCXOs, are packaged in a miniature 11.4 x 9.6 x 2.5mm, 6 pad
SMD package. Typical phase jitter for G series VCXOs is <1ps. Output
CMOS/TTL. G series VCXOs use fundamental mode crystal
osccillators. Applications include phase lock loop, SONET/ATM, set-
top boxes, MPEG , audio/video modulation, video game consoles and
HDTV.
SPECIFICATION
Frequency Range
Vdd = +3.3VDC:
0.625MHz to 50.0MHz
Vdd = +5.0VDC:
1.0MHz to 50.0MHz
Supply Voltage:
+3.3 VDC ±5% or +5.0VDC±5%
Output Logic:
TTL/HCMOS
Integrated Phase Jitter:
1.0ps maximum 12kHz to 20MHz
Period Jitter RMS:
2.0ps typical
Period Jitter Peak to Peak:
14ps maximum
Phase Noise:
See table below
Initial Frequency Accuracy
Tune to the nominal frequency with:
+3.3VDC:
Vc= 1.65V ±0.2V
+5.0 VDC:
Vc= 2.5V ±0.2V
Output Voltage HIGH (1):
90% Vdd minimum
Output Voltage LOW (0):
10% Vdd maximum
Control Voltage Centre
+3.3VDC:
1.65V
+5.0VDC:
2.5V
Control Voltage Range
+3.3VDC:
0.3V to 3.0V
+5.0VDC:
0.5V to 4.5V
Pulling Range
+3.3VDC
±80ppm to ±120ppm (standard)
+5.0VDC:
±80ppm to ±150ppm
(±200ppm available)
Temperature Stability:
See table
Output Load:
CMOS = 15pF, TTL = 2 gates
Start-up Time:
10ms maximum, 5ms typical
Duty Cycle:
50% ±5% measured at 50% Vdd
Rise/Fall Times:
0.7ns typical (15pF load)
Current Consumption:
10 to 45mA, frequency
dependent
Linearity:
10% maximum, 6% typical
Modulation Bandwidth:
10kHz minimum
Input Impedance:
1 MW minimum
Slope Polarity:
Monotonic and Positive. (An
(Transfer function)
increase of control voltage
always increases output
frequency.)
Storage Temperature:
-50° to +100°C
Ageing:
±5ppm per year maximum
RoHS Status:
Fully compliant
FREQUENCY STABILITY
Stability Code Stability ±ppm Temp. Range
A
25
0°~+70°C
B
50
0°~+70°C
C
100
0°~+70°C
D
25
-40°~+85°C
E
50
-40°~+85°C
F
100
-40°~+85°C
If non-standard frequency stability is required
Use ‘I’ followed by stability, i.e. I20 for ±20ppm
OUTLINE & DIMENSIONS
G62 VCXO
625.0kHz ~ 50.0MHz
PHASE NOISE
Offset
10Hz
100Hz
1kHz
10kHz
1MHz
Frequency 27.0MHz
-70dBc/Hz
-105dBc/Hz
-132dBc/Hz
-142dBc/Hz
-150dBc/Hz
PART NUMBERING
Example:
3 G62 B-80N-27.000
Supply Voltage
3 = +3.3V
5 = +5.0V
Series Designator
G62
Stability over temperature range
(See table)
Pullability in ±ppm
Pullability determinator
N = minimum
M = maximum
T = Typical
Frequency in MHz
EUROQUARTZ LIMITED Blacknell Lane CREWKERNE Somerset UK TA18 7HE
Tel: +44 (0)1460 230000 Fax: +44 (0)1460 230001 info@euroquartz.co.uk www.euroquartz.co.uk
What is the difference between these two circuit diagrams?
Aren't the effects of these two circuit diagrams the same? Aren't they both lighting up the LED when the base is high? Why are the designs different?...
面纱如雾 PCB Design
Highlight Review | “Big Names” Gathered at 2018 IMS
At the 2018 IMS exhibition, ADI joined the ranks of major advocates and influencers in the fields of RF, microwave and millimeter wave technology. Many of the latest technologies, including pluggable ...
电路艺术 ADI Reference Circuit
Gangnam Style Houses Cost at Least 4.4 Million. Check Out the Houses of the Rich in Korea
"Gangnam Style" became popular overnight, satirizing the gap between the rich and the poor in South Korea. Singing and dancing, you know that the housing prices in the rich areas of Gangnam in South K...
随风北漂 Talking
【FPAG design issues】
When doing FPGA development, first pass the simulation under DSP Builder, use Signal Compiler to generate the corresponding file, and then run the .tcl file under Modelsim and get an error. The situat...
eeleader FPGA/CPLD
Driver confusion~~~How to edit and replace the system driver???
I have only been in contact with drivers for a month, and I am still in the exploratory stage... I have installed VC6, XP DDK, Driver Studio (including Softice) on my computer. I used the DriverWizard...
ray23 Embedded System
The rosin flux added to the solder wire has a flavor
The rosin flux added to the solder wire has a flavor that is a bit like the smell of electric mosquito coils. What's going on? Is it a new technology?...
tantantian MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1840  2609  1653  2842  342  38  53  34  58  7 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号