BLF8G10LS-300P
Power LDMOS transistor
Rev. 2 — 17 December 2013
Product data sheet
1. Product profile
1.1 General description
300 W LDMOS power transistor for base station applications at frequencies from
700 MHz to 1000 MHz.
Table 1.
Typical performance
Typical RF performance at T
case
= 25
C in a common source class-AB production test circuit.
Test signal
2-carrier W-CDMA
[1]
f
(MHz)
758 to 803
V
DS
(V)
28
P
L(AV)
(W)
65
G
p
(dB)
20.5
D
(%)
32
ACPR
(dBc)
35
[1]
Test signal: 3GPP test model 1; 1 to 64 DPCH; PAR = 7.2 dB at 0.01 % probability on CCDF per carrier;
carrier spacing 5 MHz.
1.2 Features and benefits
Excellent ruggedness
High efficiency
Low thermal resistance providing excellent thermal stability
Lower output capacitance for improved performance in Doherty applications
Designed for low memory effects providing excellent pre-distortability
Internally matched for ease of use
Integrated ESD protection
Compliant to Restriction of Hazardous Substances (RoHS) Directive 2002/95/EC
1.3 Applications
RF power amplifier for multi standards and multi carrier applications in the 700 MHz to
1000 MHz frequency range
NXP Semiconductors
BLF8G10LS-300P
Power LDMOS transistor
2. Pinning information
Table 2.
Pin
1
2
3
4
5
Pinning
Description
drain1
drain2
gate1
gate2
source
[1]
Simplified outline
Graphic symbol
[1]
Connected to flange.
3. Ordering information
Table 3.
Ordering information
Package
Name Description
BLF8G10LS-300P
-
earless flanged balanced ceramic package; 4 leads
Version
SOT539B
Type number
4. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
DS
V
GS
T
stg
T
j
[1]
Parameter
drain-source voltage
gate-source voltage
storage temperature
junction temperature
Conditions
Min
-
0.5
65
[1]
Max
65
+13
+150
225
Unit
V
V
C
C
-
Continuous use at maximum temperature will affect the reliability, for details refer to the on-line MTF
calculator
5. Thermal characteristics
Table 5.
Symbol
Thermal characteristics
Parameter
Conditions
T
case
= 80
C;
P
L
= 65 W
Typ
0.29
Unit
K/W
R
th(j-case)
thermal resistance from junction to case
BLF8G10LS-300P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 17 December 2013
2 of 13
NXP Semiconductors
BLF8G10LS-300P
Power LDMOS transistor
6. Characteristics
Table 6.
DC characteristics
T
j
= 25
C; values per section unless otherwise specified.
Symbol Parameter
V
(BR)DSS
drain-source breakdown
voltage
V
GS(th)
V
GSq
I
DSS
I
DSX
I
GSS
g
fs
R
DS(on)
Conditions
V
GS
= 0 V; I
D
= 2.2 mA
Min
65
1.5
-
-
-
-
-
-
Typ
-
1.9
2.0
-
38.1
-
15.0
Max
-
2.3
-
2.4
-
240
-
Unit
V
V
V
A
A
nA
S
gate-source threshold voltage V
DS
= 20 V; I
D
= 220 mA
gate-source quiescent voltage V
DS
= 28 V;
I
D
= 1000 mA
drain leakage current
drain cut-off current
gate leakage current
forward transconductance
drain-source on-state
resistance
V
GS
= 0 V; V
DS
= 28 V
V
GS
= V
GS(th)
+ 3.75 V;
V
DS
= 20 V
V
GS
= 11 V; V
DS
= 0 V
V
DS
= 20 V; I
D
= 11 A
V
GS
= V
GS(th)
+ 3.75 V;
I
D
= 7.7 A
0.086 -
Table 7.
RF characteristics
Test signal: 2-carrier W-CDMA; PAR = 7.2 dB at 0.01 % probability on CCDF; 3GPP test model 1;
1 to 64 DPCH; f
1
= 760.5 MHz; f
2
= 765.5 MHz; f
3
= 795.5 MHz; f
4
= 800.5 MHz; RF performance at
V
DS
= 28 V; I
Dq
= 2000 mA; T
case
= 25
C; unless otherwise specified.
Symbol Parameter
G
p
RL
in
D
ACPR
power gain
input return loss
drain efficiency
Conditions
P
L(AV)
= 65 W
P
L(AV)
= 65 W
P
L(AV)
= 65 W
Min
19.5
-
28
-
Typ
20.5
12
32
35
Max
-
8
-
32
Unit
dB
dB
%
dBc
adjacent channel power ratio P
L(AV)
= 65 W
7. Test information
7.1 Ruggedness in class-AB operation
The BLF8G10LS-300P is capable of withstanding a load mismatch corresponding to
VSWR = 10 : 1 through all phases under the following conditions: V
DS
= 28 V;
I
Dq
= 2000 mA; P
L
= 65 W (2-carrier W-CDMA); f = 758 MHz.
BLF8G10LS-300P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 17 December 2013
3 of 13
NXP Semiconductors
BLF8G10LS-300P
Power LDMOS transistor
7.2 Impedance information
Table 8.
Typical impedance
Measured load-pull data per section; I
Dq
= 1000 mA; V
DS
= 28 V
f
(MHz)
720
746
757
769
791
805
820
869
881
894
925
942
960
[1]
Z
S[1]
()
2.3
j2.8
2.5
j3.2
2.3
j3.6
2.6
j3.6
2.6
j3.9
2.6
j3.9
2.7
j4.2
2.8
j4.1
2.9
j4.4
3.3
j4.7
3.6
j5.2
4.1 j 5.7
4.7
j5.9
Z
S
and Z
L
defined in
Figure 1.
Z
L[1]
()
1.6
j2.7
1.7 j2.6
1.6
j2.5
1.7
j2.4
1.5
j2.8
1.8
j2.3
1.6
j2.1
1.2
j2.1
1.2
j2.1
1.1
j2.1
1.2
j2.1
1.1
j2.2
1.1
j2.2
P
L(3dB)
(W)
204.4
220.0
225.2
227.9
214.8
207.2
228.5
217.2
219.9
215.4
223.5
220.5
218.8
Fig 1.
Definition of transistor impedance
BLF8G10LS-300P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 17 December 2013
4 of 13
NXP Semiconductors
BLF8G10LS-300P
Power LDMOS transistor
7.3 Test circuit
Printed-Circuit Board (PCB): Rogers RO4350;
r
= 3.66 F/m; thickness = 0.76 mm;
thickness copper plating = 35
m
See
Table 9
for list of components.
Fig 2.
Component layout
Table 9.
List of components
See
Figure 2
for component layout.
Component
C1, C2
C3, C6, C9
C4, C5, C8
C7
R1
Description
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
multilayer ceramic chip capacitor
electrolytic capacitor
chip resistor
Value
82 pF
10
F,
50 V
82 pF
470
F,
63 V
4.7
SMD 1206
Remarks
ATC 800B
Murata
ATC 100B
7.4 Graphical data
Following are typical RF measurements of the BLF8G10LS-300P in its class-AB test
circuit.
BLF8G10LS-300P
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product data sheet
Rev. 2 — 17 December 2013
5 of 13
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