DSC-544
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®
14-BIT DIGITAL-TO-SYNCHRO
CONVERTER
FEATURES
•
High Efficiency
•
Powered from Reference Input
•
Power Dissipation Cut in Half
• 4.5 VA at 400 Hz Dissipates 6 W
• 1.5 VA at 60 Hz Dissipates 3 W
•
No External +15 V or -15 V Supplies
Required
•
No External Transformer Required at
60 Hz
•
Reliable:
• Rugged Power Amplifiers with
Current Limiting
• Short Circuit Protection
• Overvoltage Transient Protection
• Thermal Cutoff
•
Digital Input:
• CMOS and TTL Compatible
• Parallel Binary Angle Input
•
Output:
• Transformer-Isolated
• 90 V Synchro Output at 400 Hz
and 60 Hz
DESCRIPTION
The DSC-544 Digital-to-Synchro (D/S) converter compliments DDC’s
low profile DSC-644 industry standard by providing additional fea-
tures. The DSC-544 has a 0.82” high profile and standard pinouts.
The need for +15 V and -15 V power supplies has been eliminated.
The unit is powered from the reference input by an internal pulsating
power supply, making it very efficient. The reduced heat dissipation
has made it possible to increase the load at 400 Hz by a factor of
three, and the power output at 60 Hz is limited only by the size of the
internal power transformer.
The DSC-544 also retains the many improved features of the DSC-
644. The output is fully protected against overloads, transients from
load kickbacks, short circuits and overheating. An aluminum top plate
in the module improves thermal dissipation. In addition, the circuit
design provides a smoother, more accurate output with improved
transient response and negligible scale factor variation.
APPLICATIONS
The DSC-544 is the preferred D/S converter when its special features
are required. The converter can be used in many applications where
digitized shaft angle data must be converted to synchro form to drive
control transformers, control differential transmitters, and angle indi-
cators, and in computer-based systems where D/S information is
used, such as simulators, flight trainers, flight instrumentation, and
fire control systems. Rugged, and MIL-STD-202 compliant, the DSC-
544 is suitable for the most severe industrial and military applications,
including military ground support and avionics.
FOR MORE INFORMATION CONTACT:
Data Device Corporation
105 Wilbur Place
Bohemia, New York 11716
631-567-5600 Fax: 631-567-7358
www.ddc-web.com
Technical Support:
1-800-DDC-5757 ext. 7771
All trademarks are the property of their respective owners.
©
1981, 1999 Data Device Corporation
Data Device Corporation
www.ddc-web.com
OUTPUT ISOLATION
SECTION
POWER
TRANSFORMER
D/R POWER
SUPPLY
PULSATING
POWER
SUPPLY
RH
REFERENCE
INPUT
RL
REF INPUT ISOLATION
SECTION
RH
REFERENCE
TRANSFORMER
SIN
COS
DIGITAL
TO
RESOLVER
CONVERTER
OUTPUT
ISOLATION
TRANSFORMER
RL
MSB
S1
S
C
OUTPUT
POWER
AMPLIFIERS
S2 SYNCHRO
OUTPUT
S3
2
BIT 1
DIGITAL
INPUT
LSB
BIT 14
+5V
GND
DSC-544
G-12/04-0
FIGURE 1. DSC-544 BLOCK DIAGRAM
TABLE 1. DSC-544 SPECIFICATIONS
PARAMETER
RESOLUTION
ACCURACY (TO FULL LOAD)
Output Accuracy
Differential Linearity
ANALOG OUTPUT (TRANSFORMER-ISOLATED)
Drive Capability (L-L Balanced)
Synchro Output
90 Vrms L-L, 360-440 Hz Option H
90 Vrms L-L, 60-63 Hz Option I
Output Scale Factor
Absolute (All Causes)
14 bits
VALUE
±4 minutes
±1 LSB max
4.5 VA max. inductive load, 57.7 mA max.
1.5 VA max. inductive load, 19.2 mA max.
±3.5% max simultaneous amplitude variation on all output lines, including variation with
digital angle. Output amplitude tracks reference input amplitude.
±0.5% max.
±0.2% max.
Variation With Digital Angle
Output Quadrature
DIGITAL INPUT
Logic Type
Natural binary angle. Parallel positive logic TTL compatible. Transient protected CMOS
33 kΩ pull-up to +5 V
0.13 Std TTL loads
Loading
The output amplifiers will drive loads with any phase angle
from -90° to +90°.
REFERENCE INPUT (TRANSFORMER-ISOLATED)
Reference Voltage Level
Max Voltage Without Damage
Current
No Load
Option H
Option I
Additional With Load
POWER SUPPLY
Voltage
Max Voltage Without Damage
Current
TEMPERATURE RANGES
Operating (Temperature of Metal Plate on Top of Case)
-1 Option
-2 Option
-3 Option
Storage
PHYSICAL CHARACTERISTICS
Size (Encapsulated Module)
Weight
115 Vrms ±10%
138 Vrms
20 mA typ., 40 mA max.
40 mA typ., 85 mA max.
1 mA per mA of load
+5 V ±5%
+7 V
20 mA max.
-55°C to +85°C
-40°C to +85°C
0°C to +70°C
-55°C to +125°C
3.125 x 2.625 x 0.82 inches
(7.94 x 6.67 x 2.08 cm)
8 oz
(227 gm)
Note: These specifications apply to up to 10% harmonic distortion on reference input.
Data Device Corporation
www.ddc-web.com
3
DSC-544
G-12/04-0
INTRODUCTION
The DSC-544 circuit is divided into three parts which are trans-
former-isolated from each other (see FIGURE 1). The first part
contains the reference input, the second part contains the digital
input and an internal digital-to-resolver (D/R) converter, and the
third part contains output power amplifiers and an associated
pulsating power supply.
Reference input isolation is provided by the reference trans-
former and by the power transformer. The converter output sig-
nals are proportional to the applied reference, and any distortion
in the reference input will appear in the output signals. The power
transformer has a voltage clamp which protects the power ampli-
fiers against transients in the reference input.
The internal D/R converter in the DSC-544 operates from an
internal power supply connected to the reference input. The cir-
cuit in the internal D/R is based on an algorithm whose theoreti-
cal math error is only ±3.5 arc-seconds (less than 5% of 1 LSB)
and whose theoretical scale factor variation with angle is less
than ±0.015%. The output is clean, with negligible glitches at
major transition points. The accuracy and scale factor errors are
not limited by the physical components, but by the algorithm.
The digital inputs are transient-protected CMOS switches with
33
kΩ
pull-up resistors that are connected to the +5 V supply, and
can be driven by all standard TTL gates. If the TTL gates drive
other loads as well, the circuit must allow the 33
kΩ
resistors to
pull-up the logic 1 level to within 1.0 V of the +5 V supply. Bit
weights for the 14 binary inputs are given in TABLE 2. The angle
is determined by adding bits that are in the logic 1 state.
+v
+DC SUPPLY LEVEL
POSITIVE PULSATING
SUPPLY VOLTAGE
AMPLIFIER OUTPUT
VOLTAGE ENVELOPE
NEGATIVE PULSATING
SUPPLY VOLTAGE
-v
-DC SUPPLY LEVEL
FIGURE 2. PULSATING POWER SUPPLY
VOLTAGE WAVEFORMS
The output section of the DSC-544 offers the most benefits to its
users. The pulsating power supply produces two unfiltered, full-
wave-rectified positive and negative voltages (see FIGURE 2).
These voltages are in phase with the amplifier output voltage
because power is derived from the reference input. The ampli-
tude of the two voltages only needs to be a few volts greater than
the power amplifier voltage, since both will change together if the
reference voltage level changes. As FIGURE 2 indicates, the
positive and negative pulsating power supply voltage levels will
consistently be lower than the constant DC levels of the DC sup-
ply. Since the voltage levels are lower, the power consumed will
be much less. The power dissipated as heat is equal to the ampli-
fier current times the difference in voltage between the power
supply and the output. For the DSC-544, the power dissipated is
reduced by approximately 50% for reactive loads.
Another advantage of deriving power from the reference input is
that the amplifier section power is easily transformer-isolated
from the D/R converter. The converter output isolation trans-
former can therefore be located in front of the power amplifiers.
Since it does not transfer power, it can be made smaller and an
internal transformer can be used for 60 Hz.
Minimum load impedances are listed in TABLE 1, under Drive
Capability. The DSC-544 is capable of driving the specified load
impedances under worst case conditions. The minimum load
impedances correspond to 4.5 VA at 400 Hz and 1.5 VA at 60 Hz
when frequencies and voltage levels are at their nominal values.
Adequate air circulation is required over the metal top of the con-
verter module. A thermal cutout will disable the converter’s out-
put amplifiers if its internal temperature reaches 125°C. The out-
put is automatically restored when the temperature drops below
125°C.
TABLE 2. BIT WEIGHT TABLE
BIT
1 MSB
2
3
4
5
6
7
8
9
10
11
12
13
14 LSB
DEG/BIT
180
90
45
22.5
11.25
5.625
2.813
1.406
0.7031
0.3516
0.1758
0.0879
0.0439
0.0220
MIN/BIT
10,800
5,400
2,700
1,350
675
337.5
168.75
84.38
42.19
21.09
10.55
5.27
2.64
1.32
Data Device Corporation
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4
DSC-544
G-12/04-0
+V
S1-S3 = V
MAX
MAX
SINθ
S3
In Phase with
RH-RL of Converter
2/3 Zso
0
360
30
90
150
210
270
330
θ
CCW
(DEGREES)
Zso = R + jXL
-V
2/3 Zso
MAX
S3-S2 = V
S2-S1 = V
MAX
SIN(θ
+ 120°)
2/3 Zso
MAX
SIN(θ
+ 240°)
S1
S2
FIGURE 3. SYNCHRO OUTPUT SIGNALS
FIGURE 4. Z
SO
MEASUREMENT
OUTPUT PHASING AND SCALE FACTOR
The analog output signals have the following phase relationship
and are shown in Figure 3.
S1-S3 = (RH-RL) Ao [1 + A(θ) sin
θ]
S3-S2 = (RH-RL) Ao [1 + A(θ) sin (θ + 120
°
)]
S2-S1 = (RH-RL) Ao [1 + A(θ) sin (θ + 240
°
)]
The output amplitudes simultaneously track the reference volt-
age fluctuations because they are proportional to (RH-RL). The
amplitude factor Ao is 90/115 for 90V rms L-L output. The
term A(θ) represents the variation of the amplitude with the digi-
tal input angle. A(θ), which is called the scale factor variation, is
a smooth function of
θ
without discontinuities. Because A(θ) is so
small, the DSC-544 can be used to drive systems such as X-Y
plotters or CRT displays in which the sine and cosine outputs are
used independently (not ratiometrically as in a control trans-
former).
DRIVING CT AND CDX LOADS
When driving CT and CDX loads the DSC-544 must have
enough steady-state power capability to drive the Zso of the
load. Zso (stator impedance with rotor open-circuited) is mea-
sured as shown in FIGURE 4.
TABLE 3 lists the load impedance of some typical control trans-
formers. Control transformers are highly inductive loads and it is
possible to save power by tuning inductive loads. Three capaci-
tors may be placed across the legs of the synchro stator in a
delta configuration as shown in FIGURE 5.
The correct value of the capacitance C in Farads is given by:
C=
X
L
4πfR
2
+ X
L2
Note: RH and RL reference input is 180° out of phase with modern synchro/digital
converters per ARINC 407 compliant standard. To be ARINC 407 compliant
swap RH and RL to the converter. Also reference MIL-S-20708 standards.
where f is the carrier frequency and R and X
L
are the series real
and reactive components of Zso. High grade capacitors must be
used and they must be able to withstand the full AC output volt-
age.
When the load has been tuned more loads can be driven in par-
allel, the load impedance Z is increased to :
TABLE 3. TYPICAL CONTROL TRANSFORMERS AND
THEIR LOAD IMPEDANCES
MILITARY PART NUMBER
26V 08CT4c
26V 11CT4d
11CT4e
15CT4c
15CT6b
18CT4c
18CT6b
23CT4a
23CT6a
SIZE
08
11
11
15
15
18
18
23
23
ZSO
100 + j490
21 + j132
838 + j4955
1600 + j9300
1170 + j6780
1420 + j13260
1680 + j5040
1460 + j11050
1250 + j3980
R
2
+ X
L2
Z=
R
S3
C
C
S1
C
S2
FIGURE 5. DELTA TUNING CONFIGURATION
Data Device Corporation
www.ddc-web.com
5
DSC-544
G-12/04-0
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