KB8527B
INTRODUCTION
KB8527B is a monolithic circuit which can be used in high
performance 60MHz MCA type CLP System.
1 CHIP CLP SUBSYSTEM IC
48 -QFP- 1010E
The KB8527B is a subsystem IC for FM / FSK receiving syste-
ms and a complete one chip FM / FSK receiver IC for 60MHz
system. It`s feature includes receiving functions for FM / FSK
systems, a compandor to remove external noise, and PLL ( Ph-
ase Lock Loop ) of channel selection which blocks surrounding
frequency interference.
The KB8527B can be used with a wide range of FM / FSK VHF
bandwidth systems, including cordless phone, and the narrow
band voice and data sending / receiving systems.
To make applications easily and simply, pheripheral parts are
minimized.
ORDERING INFORMATION
Device
+ KB8527BQ
Package
48 - QFP - 1010E
Operating Temperature
-20
o
C ~ + 70
o
C
+ : New product
FEATURES
¡ Ü
Operating voltage range : 2.0V ~ 5.5V
Typical supply current : 13.5mA at 3.6V
Built - in low battery detection function ( selectable 3.45V, 3.3V, 3.0V, 2.2V, 2.1V )
Built - in speaker amplifier
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¡ Ü
¡ Ü
• Built - in splatter filter
• Built - in dual conversion receiver, compandor and universal PLL
¡ Ü
FM Receiver
- Complete dual coversion circuit
- Excellent input sensitivity (0.7µVrms at 20dB SINAD)
Compandor
- Easy gain control to use external component
- Included ALC (Automatic Level Control) circuit
- Included Mute logic
Universal PLL
- RX (TX) divided counter range : 1/16 ~ 1/16383
- Reference frequency divided counter range : 1/16 ~ 1/4095
- Lock detector signal output
- Serial interface with MICOM for controlling each block
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¡ Ü
KB8527B
BLOCK DIAGRAM
GND
(RX)
VCC
(RX)
1 CHIP CLP SUBSYSTEM IC
DSCO
DSCI
2LOI
2MO
36
35
34
33
32
31
30
29
28
RAO
QCI
LD
27
26
25
X-tal
OSC
Limiting
IF AMP
FSK
COMP
MDO
2LOI
LI
Regulator
(1V)
VREF
24
V
REF
(COMP)
2MI
37
1MO
2`nd
MIX
IF AMP
(455KHz)
38
Meter
Driver
Rectifier
PRI
+
-
23
22
ALC
EPI
1LOI
39
1LOI
40
RX
VCO
Quad
Detector
AMP
Carrier
Detector
21 ERC
SUM
AMP
20 EO
19 SAI
18 SAO1
SPK
AMP
17 SAO2
16
VCC
(COMP)
VCO
41
RX
1`st
MIX
IF AMP
(10.7MHz)
1MI
42
1MI
43
GND
(PLL)
Low
Battery
Detector
Gain Cell
SPK
AMP
Regulator
( 2.15 V )
Buffer
Limiter
44
SUM
AMP
+
PRI
PDR
45
V
REF
(PLL)
Programmable Counter
( RX )
Gain Cell
Programmable Counter
( TX )
Programmable Counter
( REF )
-
15 GND
(COMP)
14 CPI+
13 CPI -
46
47
ALC
4_25 CNT
Rectifier
V
CC
(PLL)
TIF
48
RX Phase
Detector
TX Phase
Detector
Splatter
Filter
fMCU
CONTROL
Compandor
mute
1
PDT
2
CO
3
SFI
4
SFO
5
CDO/LDT
6
GND
(PLL)
7
CLK
8
DATA
9
EN
10
LBD
11
AGIC
12
CRC
KB8527B
1 CHIP CLP SUBSYSTEM IC
PIN CONFIGURATION
VCC
(RX)
GND
(RX)
DSCO
26
DSCI
36
2MI 37
1MO 38
1LOI 39
1LOI 40
VCO
RX
41
1MI 42
1MI 43
GND
(PLL)
44
PDR 45
V
REF(PLL)
46
V
CC(PLL)
47
TIF 48
1
PDT
35 34
33
32
31
QCI
LD
30
29
28 27
25
24 V
REF(COMP)
23 ALC
22 EPI
21 ERC
20 EO
KB8527B
MDO
19 SAI
18 SAO1
17 SAO2
16 VCC
(COMP)
15 GND
(COMP)
14 CPI+
13 CPI -
12
CRC
2LOI
2LOI
2MO
2
CO
3
SFI
4
SFO
5
CDO/LDT
6
GND
(PLL)
7
CLK
8
DATA
RAO
9
EN
LI
10
LBD
11
AGIC
KB8527B
PIN DESCRIPTION
Pin No
Symbol
1 CHIP CLP SUBSYSTEM IC
Description
Phase detector output terminal of the transmitter at PLL.
1
PDT
If f
TX
> f
REF
or f
TX
is leading
If f
TX
< f
REF
or f
TX
is lagging
if f
TX
= f
REF
and the same phase
the output is negative pulse
the output is positive Pulse
the output is High Impedance
2
CO
SFI
Compressor output terminal of compandor ; connected to the splatter filter amp
input terminal.
Input terminal of Splatter filter amp.
Output terminal of Splatter filter amp.
3
4
SFO
LDT : Output terminal of transmitter lock detector in PLL block. Output is low
if PLL is in lock state and is high if PLL is in unlock state.
LDT/
CDO
CDO : As an output terminal of the carrier detector buffer, connected to (RSSI )
terminal of MICOM. This pin outputs the contents of Meter Driver buffer
which is turned on / off, according to the signal level detected by Meter
Driver.
Ground.
Ground of logic section at PLL.
5
6
GND
PLL
7
8
9
CLK
DATA
EN
These pins are serial interface terminals for programming reference counter,
auxiliary reference counter, TX channel counter, RX channel counter and control
block that controls internal each block with test mode and power saving mode.
10
LBD
Low Battery Detecting output. ( Selectable 3.45V, 3.3V, 3.0V, 2.2V, 2.0V ).
During the normal operation, output level is low, but it is high at low battery
detection. As this pin is an open collector type, it requires a pull - up resister.
This pin bypasses AC elements at the feedback loop which come from the SUM
11
AGIC
amp block of COMPRESSOR. A capacitor should be connected between this ter-
minal and GND. ( C = 2.2 uF )
KB8527B
Pin No
12
Symbol
CRC
1 CHIP CLP SUBSYSTEM IC
Description
Converts waveform from the full wave rectifier to DC element at the rectifier block
of Compressor. ( RC = 33 msec )
Pre - amp inverting input terminal of Compressor.
Adjusts the negative feedback loop gain. ( in application, gain is 5 )
Pre - amp non - inverting input terminal of Compressor.
Used as an input terminal for voice signals.
13
CPI -
14
CPI +
15
GND
(COMP)
Ground.
Ground of Compandor.
Supply voltage.
Power supply terminal of Compandor.
16
Vcc
(COMP)
Output terminal of speaker amp 2.
17
SAO 2
This signal is the same as SAO1 output, but phase difference is 180
o
DC voltage level is ( Vcc - 0.7V ) / 2.
Output terminal of Speaker amp 1.
DC voltage level is ( Vcc - 0.7V ) / 2.
for SAO1.
18
SAO 1
19
SAI
Speaker Amp 1 input terminal.
Between this terminal and Expander output terminal, uses a AC coupled.
20
EO
Output terminal of Expander, from which a regenerated voice signals are emitted.
Converts waveform from the full wave rectifier to DC element at the rectifier block
21
ERC
of Expander. ( RC = 33 msec )
Pre - amp inverting input terminal of Expander.
Adjusts the negative feedback loop gain. ( in application, gain is 5 )
Reference current input terminal of Automatic Level Control ( ALC) ; Adjusts THD
of compressor output voltage to less than 3 % or limites the frequency deviation
of TX if the input is higher than a certain level. The ALC circuit may be turned
off depending on the ALC reference current or the magnitude of output voltage
may be limited if it is higher than a certain level. ( Iref = 8uA, Ralc = 120KΩ)
22
EPI -
23
ALC
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