BU-63925G1-200S datasheet, PDF

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BU-63925G1-200S: DescriptionMil-Std-1553 Controller, CMOS; CategoryThe embedded processor and controller Microcontrollers and processors; File Size824KB，49 Pages; ManufacturerData Device Corporation

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BU-63925G1-200S Overview

Mil-Std-1553 Controller, CMOS

BU-63925G1-200S Parametric

Parameter Name	Attribute value
Maker	Data Device Corporation
Reach Compliance Code	compliant
technology	CMOS
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, MIL-STD-1553

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BU-63825

SPACE LEVEL MIL-STD-1553

BC/RT/MT

ADVANCED COMMUNICATION ENGINE

(SP’ACE II) TERMINAL

FEATURES

Make sure the next

Card you purchase

has...

•

Direct Replacement for BU-61582

and BU-61583

•

Radiation Tolerant & Radiation

Hardened Versions

•

Fully Integrated 1553 Terminal

•

Flexible Processor Interface

•

16K x 16 Internal RAM

•

Automatic BC Retries

•

Programmable BC Gap Times

•

BC Frame Auto-Repeat

•

Intelligent RT Data Buffering

•

Ceramic Package

DESCRIPTION

The BU-63825(925) is a fully hardware & software compatible, direct

drop-in replacement for the BU-61582(83).

DDC’s BU-63825(925) Space Advanced Communication Engine

(Sp’ACE II) is a radiation hardened version of the BU-61580(81) ACE

terminal. DDC supplies the BU-63825 with enhanced screening for

space and other high reliability applications.

The BU-63825 provides a complete integrated BC/RT/MT interface

between a host processor and a MIL-STD-1553 bus. The

BU-63825(925) provides functional and software compatibility with

the standard BU-61580(81) product and is packaged in the same 1.9

square-inch package footprint.

As an option, DDC can supply the BU-63825 with space level screen-

ing. This entails enhancements in the areas of element evaluation

and screening procedures for active and passive elements, as well as

the manufacturing and screening processes used in producing the

terminals.

The BU-63825 integrates dual transceiver, protocol, memory man-

agement and processor interface logic, and 16K words of RAM in the

choice of 70-pin DIP or flat pack packages. Transceiverless versions

may be used with an external electrical or fiber optic transceiver.

To minimize board space and ‘glue’ logic, the Sp’ACE II terminals

provide flexibility in interfacing to a host processor and internal/exter-

nal RAM.

•

Multiple Ordering Options;

+5V (Only)

+5V/-15V

+5V/-12V

+5V/Transceiverless

+5V (Only, with Transmit Inhibits)

WARNING: ITAR CONTROLLED PRODUCT

The product(s) referenced on this data sheet or product

brief and certain related technical data is subject to the

U.S. Department of State International Traffic in Arms

Regulations (ITAR) 22 CFR 120-130 and may not be

exported without the appropriate prior authorization from

the Directorate of Defense Trade Controls, United States

Department of State. This datasheet includes only basic

marketing information on the function of the product and

therefore is not considered technical data as defined in

22CFR 120.10.

FOR MORE INFORMATION CONTACT:

Data Device Corporation

105 Wilbur Place

Bohemia, New York 11716

631-567-5600 Fax: 631-567-7358

www.ddc-web.com

Technical Support:

1-800-DDC-5757 ext. 7771

All trademarks are the property of their respective owners.

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