UNISONIC TECHNOLOGIES CO., LTD
8565
Preliminary
LINEAR INTEGRATED CIRCUIT
HIGH PERFORMANCE POWER
FACTOR CORRECTION
CONTROLLER IN CONTINUOUS
CONDUCTION MODE
DESCRIPTION
The UTC
8565
is a wide input range controller integrated circuit for
active power factor correction. The circuit is designed for boost PFC
application, and requires reduced external component count. Its power
supply is recommended to be provided by an external auxiliary supply
which will switch on and off the IC.
The circuit operates in the continuous conduction mode under average
current, and in discontinuous conduction mode only in light load
condition. The switching frequency can be set with the external resistor at
pin 4. Both current and voltage loop compensations are done externally
to allow full user control.
There are many kinds of protection features incorporated to make sure of safe system operation conditions, such as
brown-out protection, output under voltage detection and peak current limitation. The inside reference is adjusted
(5V±2%) to make sure control level and precise protection. There is a particular soft-start function to limit the start up
current and thus reduces the stress on the boost diode.
FEATURES
* Supports wide input range
* Average current control
* Ease of use with few external components
* External current and voltage loop compensation
* Trimmed internal reference voltage (5V±2%)
* Programmable operating/switching frequency
*
(50kHz ~ 250kHz)
* Max duty cycle of 95% (typ) at 125kHz
* Under voltage lockout
* Cycle by cycle peak current limiting
* Over-voltage protection
* Open loop detection
* Output under-voltage detection
* Brown-out protection
* Soft Over current Protection
* Enhanced dynamic response
ORDERING INFORMATION
Ordering Number
Lead Free
8565L-S08-R
8565L-S08-T
8565L-S08-R
Halogen Free
8565G-S08-R
8565G-S08-T
Package
SOP-8
SOP-8
(1) R: Tape Reel, T: Tube
(2) S08: SOP-8
(3) G: Halogen Free, L: Lead Free
Packing
Tape Reel
Tube
(1)Packing Type
(2)Package Type
(3)Lead Free
www.unisonic.com.tw
Copyright © 2012 Unisonic Technologies Co., Ltd
1 of 13
QW-R114-004.b
8565
PIN CONFIGURATION
GND 1
Preliminary
LINEAR INTEGRATED CIRCUIT
8
V
CC
I
COMP
2
7
GATE
I
SENSE
3
6
V
SENSE
FREQ 4
5
V
COMP
PIN DESCRIPTION
PIN NO.
1
2
PIN NAME
V
SENSE
V
COMP
DESCRIPTION
The output bus voltage of the boost converter is sensed at this pin via a resistive divider.
The reference voltage for this pin is 5V.
This VCOMP Pin provides the compensation of the output voltage loop with a
compensation network to ground (see Fig. 2). This also gives the soft start function which
controls an increasing AC input current during start-up.
At this pin the compensation components of the current loop are connected. The
capacitor which is connected at this pin integrates the output current of OTA2 and
averages the current sense signal.
A resistor connected to this pin sets the fixed switching frequency. The frequency range
is from 50kHz to 250kHz.
The pin senses the negative voltage drop at the external sense resistor (R1). This is the
input signal for the average current regulation in the current loop. It is also fed to the
peak current limitation block. During power up time, high inrush currents cause high
voltage drop at R1, driving currents into pin 5 which could be beyond the absolute
maximum ratings. Therefore a series resistor (R2) of around 220Ω is recommended in
order to limit this current into the IC.
This is the Ground pin.
The GATE pin is the output of the internal driver stage, which has a capability of 1.5A
source and sink current. Its gate drive voltage is clamped at 11.5V (typically).
The V
CC
pin is the positive supply of the IC and should be connected to an external
auxiliary supply. The operating range is between 10V and 21V. The turn-on threshold is
at 11.2V and under voltage occurs at 10.2V.
3
4
I
COMP
FREQ
5
I
SENSE
6
7
8
GND
GATE
V
CC
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
2 of 13
QW-R114-004.b
8565
BLOCK DIAGRAM
RFI Filter
D2...D5
Preliminary
LINEAR INTEGRATED CIRCUIT
L1
Vin
85...265 VAC
C1
R1
R2
GND
UTC 8565
Variable Oscillator
FREQ
2.5V
+
-
OTA3
OSC CLK
250ns
Toff min
PWM Logic
R
S
R
S
D1
R7
C2
R3
V
OUT
R4
auxiliary supply
V
CC
GATE
Gate Driver
R5
Peak Current Limit
Protection Block
V
CC
Current Sense
Opamp -1.43x
OP1
Over-current
Comp
300ns
+
C2
1.5V -
I
SENSE
Deglitcher
Ramp Generator
PWM Comp
+
C1
-
Protection
Logic
Fault
UV lockout
+
C4
2.5V
-
OUP
+
C3
-
OLP
0.8V
V
SENSE
Current Loop
Voltage Loop
0.73V
Fault
S1
+/-30μA, 42μS
-
OTA1
Current Loop Comp
I
COMP
C3
+
OTA2
-
1.1mS
+/-50μA linear range
S2
0
-ve
Nonlinear
Gain
Soft Over
Current Control
+
5V
4.75V
+ve
0
5.25V
Soft Start
4.0V
V
COMP
4.0V
-ve
Fault
Window Detect
R6
C4
C5
Representative Block diagram
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
3 of 13
QW-R114-004.b
8565
Preliminary
LINEAR INTEGRATED CIRCUIT
ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
RATINGS
UNIT
V
CC
Supply Voltage
V
CC
-0.3 ~ 22
V
FREQ Voltage
V
FREQ
-0.3 ~ 7
V
ICOMP Voltage
V
ICOMP
-0.3 ~ 7
V
ISENSE Voltage
V
ISENSE
-24 ~ 7
V
±1
ISENSE Current
I
ISENSE
mA
VSENSE Voltage
V
VSENSE
-0.3 ~ 7
V
±1
VSENSE Current
I
VSENSE
mA
VCOMP Voltage
V
VCOMP
-0.3 ~ 7
V
GATE Voltage
V
GATE
-0.3 ~ 22
V
ESD Protection (Note 2)
V
ESD
2
kV
Junction Temperature
T
J
-40 ~ 150
°C
Storage Temperature
T
STG
-55 ~ 150
°C
Notes: 1. Absolute maximum ratings are those values beyond which the device could be permanently damaged.
Absolute maximum ratings are stress ratings only and functional device operation is not implied.
2. According to EIA/JESD22-A114-B (discharging a 100pF capacitor through a 1.5kΩ series resistor)
THERMAL DATA
PARAMETER
Junction to Ambient
SYMBOL
θ
JA
RATINGS
90
UNIT
K/W
ELECTRICAL CHARACTERISTICS
PARAMETER
SYMBOL
OPERATING RANGE
(Note 1)
V
CC
Supply Voltage
V
CC
Junction Temperature
T
J(CON)
SUPPLY SECTION
(Note 2)
V
CC
Turn-On Threshold
V
CCON
V
CC
Turn-Off Threshold/
V
CCUVLO
Under Voltage Lock Out
V
CC
Turn-On/Off Hysteresis
V
CCHY
Start Up Current Before V
CCON
I
CCSTART
Operating Current With Active
I
CCHG
GATE
Operating Current During Standby I
CCSTDBY
VARIABLE FREQUENCY SECTION
Switching Frequency (Typical)
F
SWNOM
Switching Frequency (Min.)
F
SW(MIN)
Switching Frequency (Max.)
F
SW(MAX)
Voltage At FREQ Pin
V
FREQ
PWM SECTION
Max. Duty Cycle
D
MAX
Min. Duty Cycle
D
MIN
Min. Off Time
T
OFF(MIN)
TEST CONDITIONS
MIN
V
CCUVLO
-40
10.5
9.4
V
VCC
=V
VCC(ON)
-0.1V
R5=33kΩ, C
L
=4.7nF
R5 = 33kΩ, V
VSENSE
=0.5V
R5=33kΩ
R5=82kΩ
R5=15kΩ
0.8
50
13.5
2.0
106
40
200
2.40
92
150
11.2
10.2
1
100
18
2.6
133
56
250
2.50
95
250
TYP
MAX UNIT
21
125
11.9
10.8
1.3
200
22.5
3.2
161
70
320
2.60
98
0
350
V
°C
V
V
V
µA
mA
mA
kHz
kHz
kHz
V
%
%
ns
F
SW
=F
SWNOM
(R5=33kΩ)
V
VCOMP
=0V, V
VSENSE
=5V, V
ICOMP
=6.4V
V
VCOMP
=5V, V
VSENSE
=5V, V
ISENSE
=0.1V
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
4 of 13
QW-R114-004.b
8565
Preliminary
LINEAR INTEGRATED CIRCUIT
ELECTRICAL CHARACTERISTICS(Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
SYSTEM PROTECTION SECTION
Open Loop Protection (OLP)
V
OLP
0.77 0.81 0.86
V
V
SENSE
Threshold
Peak Current Limitation (PCL)
V
PCL
-1.15 -1.08 -1.00 V
I
SENSE
Threshold
Soft Over Current Control (SOC) I
SENSE
V
SOC
-0.79 -0.73 -0.66 V
Threshold
Output Under Voltage Detection (OUV)
V
OUV
2.45 2.55 2.65
V
V
SENSE
Threshold
Output Over-Voltage Protection (OVP)
V
OVP
5.12 5.25 5.38
V
CURRENT LOOP SECTION
OTA2 Transconductance Gain
Gm
OTA2
At Temp=25°C
0.9
1.1
1.3 mS
OTA2 Output Linear Range
I
OTA2
Guaranteed by design
±50
µA
I
COMP
Voltage during OLP
V
ICOMPF
V
VSENSE
=0.5V
3.6
4.0
V
VOLTAGE LOOP SECTION
OTA1 Reference Voltage
V
OTA1
4.90 5.00 5.10
V
OTA1 Transconductance Gain
Gm
OTA1
31.5 42 52.5 µS
OTA1 Max. Source Current Under
I
OTA1SO
V
VSENSE
=4.25V, V
VCOMP
=4V
21
30
38
µA
Normal Operation
OTA1 Max. Sink Current Under
I
OTA1SK
V
VSENSE
=6V, V
VCOMP
=4V
21
30
38
µA
Normal Operation
Soft Start End
V
SOFT
3.80 4.00 4.20
V
OTA1 Source Current Under Soft Start I
OTA1SS
V
VSENSE
=2V, V
VCOMP
=0V
8.0 10.8 13.4 µA
V
SENSE
High
V
Hi
5.12 5.25 5.38
V
Enhanced Dynamic
Response
V
SENSE
Low
V
Lo
4.63 4.75 4.87
V
V
SENSE
Input Bias Current At 5V
I
VSEN5V
V
VSENSE
=5V
0
1.5
µA
V
SENSE
Input Bias Current at 1V
I
VSEN1V
V
VSENSE
=1V
0
1
µA
V
COMP
Voltage during OLP
V
VCOMPF
V
VSENSE
= 0.5V, I
VCOMP
=0.5mA
0
0.2
0.4
V
DRIVER SECTION
1.2
V
V
CC
=5V, I
GATE
=5mA
V
CC
=5V, I
GATE
=20mA
1.5
V
GATE Low Voltage
V
GATEL
I
GATE
=0A
0.8
V
I
GATE
=20mA
1.6
2.0
V
I
GATE
=-20mA
-0.2 0.2
V
11.5
V
V
CC
=20V, C
L
=4.7nF
GATE High Voltage
V
GATEH
V
CC
=11V, C
L
=4.7nF
10.5
V
V
CC
=V
VCC(OFF)
+0.2V, C
L
=4.7nF
7.5
V
GATE Rise Time
t
R
V
GATE
=2V...9V, C
L
=4.7nF
20
ns
GATE Fall Time
t
F
V
GATE
=9V...2V, C
L
=4.7nF
20
ns
GATE Current, Peak, Rising Edge
I
GATE
C
L
=4.7nF (Note 3)
-1.5
A
GATE Current, Peak, Falling Edge
I
GATE
C
L
=4.7nF (Note 3)
1.5
A
Notes: 1. Within the operating range the IC operates as described in the functional description.
2. The electrical characteristics involve the spread of values within the specified supply voltage and junction
temperature range T
J
from -40°C to 125°C. Typical values represent the median values, which are related
to 25°C. If not otherwise stated, a supply voltage of V
CC
=15V is assumed for test condition.
3. Design characteristics (not meant for production testing)
UNISONIC TECHNOLOGIES CO., LTD
www.unisonic.com.tw
5 of 13
QW-R114-004.b
FPGA/CPLD
京公网安备 11010802033920号
EEWORLD
