TSA1001
10-BIT, 25MSPS, 35mW A/D CONVERTER
s
10-bit A/D converter in deep submicron
s
s
s
s
s
s
s
s
CMOS technology
Ultra low power consumption: 35mW @
25Msps (10mW @ 5Msps)
Single supply voltage: 2.5V
Input range: 2Vpp differential
25Msps sampling frequency
ENOB=9.7 @ Nyquist
SFDR typically up to 72dB @ Nyquist
Built-in reference voltage with external bias
capability
STMicroelectronics 8, 10, 12 and 14-bits ADC
pinout compatibility
ORDER CODE
Part Number
TSA1001CF
TSA1001CFT
TSA1001IF
TSA1001IFT
EVAL1001/AA
Temperature
Range
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
Package
TQFP48
TQFP48
TQFP48
TQFP48
Conditioning
Tray
Tape & Reel
Tray
Tape & Reel
Marking
SA1001C
SA1001C
SA1001I
SA1001I
Evaluation board
PIN CONNECTIONS
(top view)
AGND
AVCC
VCCB
GNDB
DESCRIPTION
The TSA1001 is a 10-bit, 25Msps sampling fre-
quency Analog to Digital converter using a CMOS
technology combining high performances and
very low power consumption.
The TSA1001 is based on a pipeline structure and
digital error correction to provide excellent static
linearity and go beyond 9.8 effective bits at
Fs=25Msps, and Fin=10MHz.
Especially designed for portable applications, the
TSA1001 only dissipates 35mW at 25Msps. When
running at lower sampling frequencies, even lower
consumption can be achieved.
A voltage reference is integrated in the circuit to
simplify the design and minimize external compo-
nents. It is nevertheless possible to use the circuit
with an external reference.
The output data can be coded into two different
formats. A Data Ready signal is raised as the data
is valid on the output and can be used for synchro-
nization purposes.
The TSA1001 is available in commercial (0 to
+70°C) and extended (-40 to +85°C) temperature
range, in a small 48 pins TQFP package.
APPLICATIONS
index
corner
AVCC
DFSB
VCCB
OEB
NC
NC
DR
48
1
2
3
4
5
6
7
8
9
10
11
12
13
47 46
45
44 43
42
41
40
39
38
37
36 NC
35 NC
34 NC
33 D0 (LSB)
32 D1
31 D2
NC
IPOL
VREFP
VREFM
AGND
VIN
AGND
VINB
AGND
INCM
AGND
AVCC
AVCC
TSA1001
30 D3
29 D4
28 D5
27 D6
26 D7
25 D8
14 15
16
17
18 19
20
21
22
23
24
DGND
DVCC
DVCC
DGND
CLK
DGND
NC
GNDB
GNDB
VCCB
OR
D9 (MSB)
PACKAGE
7
×
7 mm TQFP48
s
s
s
s
s
Portable instrumentation
Video processing
Medical imaging and ultrasound
High resolution fax and scanners
Digital communications
October 2000
1/19
TSA1001
ABSOLUTE MAXIMUM RATINGS
Symbol
AVCC
DVCC
VCCB
IDout
Tstg
ESD
Analog Supply voltage
1)
Digital Supply voltage
1)
Digital buffer Supply voltage
1)
Digital output current
Storage temperature
Electrical Static Discharge:
- HBM
- CDM-JEDEC Standard
Parameter
Values
0 to 3.3
0 to 3.3
0 to 3.3
-100 to 100
+150
2
1.5
Unit
V
V
V
mA
°C
KV
1). All voltages values, except differential voltage, are with respect to network ground terminal. The magnitude of input and output voltages
must never exceed -0.3V or VCC+0V
OPERATING CONDITIONS
Symbol
AVCC
DVCC
VCCB
VREFP
VREFM
Parameter
Analog Supply voltage
Digital Supply voltage
Digital buffer Supply voltage
Forced top voltage reference
Forced bottom reference voltage
Test conditions
Min
2.25
2.25
2.25
1.16
0
Typ
2.5
2.5
2.5
-
0
Max
2.7
2.7
2.7
AVCC
0.5
Unit
V
V
V
V
V
BLOCK DIAGRAM
+2.5V
VREFP
GNDA
VIN
INCM
VINB
stage
1
stage
2
stage
n
Reference
circuit
IPOL
VREFM
Sequencer-phase shifting
CLK
DFSB
OEB
Timing
Digital data correction
DR
DO
TO
D9
OR
GND
Buffers
2/19
TSA1001
PIN CONNECTIONS
(top view)
AGND
AVCC
VCCB
GNDB
AVCC
DFSB
VCCB
OEB
NC
NC
NC
DR
index
corner
48
1
2
3
4
5
6
7
8
9
10
11
12
13
47 46
45
44 43
42
41
40
39
38
37
36 NC
35 NC
34 NC
33 D0 (LSB)
32 D1
31 D2
IPOL
VREFP
VREFM
AGND
VIN
AGND
VINB
AGND
INCM
AGND
AVCC
AVCC
TSA1001
30 D3
29 D4
28 D5
27 D6
26 D7
25 D8
14 15
16
17
18 19
20
21
22
23
24
DGND
DVCC
DVCC
DGND
CLK
DGND
NC
GNDB
GNDB
VCCB
OR
D9 (MSB)
PIN DESCRIPTION
Pin No
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Name
IPOL
VREFP
VREFM
AGND
VIN
AGND
VINB
AGND
INCM
AGND
AVCC
AVCC
DVCC
DVCC
DGND
CLK
DGND
NC
DGND
GNDB
GNDB
VCCB
OR
Description
Analog bias current input
Top voltage reference
Bottom voltage reference
Analog ground
Analog input
Analog ground
Inverted analog input
Analog ground
Input common mode
Analog ground
Analog power supply
Analog power supply
Digital power supply
Digital power supply
Digital ground
Clock input
Digital ground
Non connected
Digital ground
Digital buffer ground
Digital buffer ground
Digital buffer power supply
Out Of Range output
0V
0V
0V
2.5V
CMOS output (2.5V)
CMOS output (2.5V)
1V
0V
0V
1Vpp
0V
1Vpp
0V
0.5V
0V
2.5V
2.5V
2.5V
2.5V
0V
2.5V compatible CMOS input
0V
Observation
Pin No
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Name
D8
D7
D6
D5
D4
D3
D2
D1
D0(LSB)
NC
NC
NC
NC
DR
VCCB
GNDB
VCCB
NC
NC
OEB
DFSB
AVCC
AVCC
AGND
Description
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Digital output
Least Significant Bit output
Non connected
Non connected
Non connected
Non connected
Data Ready output
Digital Buffer power supply
Digital Buffer ground
Digital Buffer power supply
Non connected
Non connected
Output Enable input
Data Format Select input
Analog power supply
Analog power supply
Analog ground
2.5V compatible CMOS input
2.5V compatible CMOS input
2.5V
2.5V
0V
CMOS output (2.5V)
2.5V
0V
2.5V
Observation
CMOS output (2.5V)
CMOS output (2.5V)
CMOS output (2.5V)
CMOS output (2.5V)
CMOS output (2.5V)
CMOS output (2.5V)
CMOS output (2.5V)
CMOS output (2.5V)
CMOS output (2.5V)
D9(MSB) Most Significant Bit output
3/19
TSA1001
ELECTRICAL CHARACTERISTICS
AVCC = DVCC = VCCB = 2.5V, Fs= 25Msps, Fin=1MHz, Vin@ -1.0dBFS, VREFM = 0V
Tamb = 25°C (unless otherwise specified)
TIMING CHARACTERISTICS
Symbol
FS
DC
TC1
TC2
Tod
Tpd
Ton
Toff
Parameter
Sampling Frequency
Clock Duty Cycle
Clock pulse width (high)
Clock pulse width (low)
Data Output Delay (Fall of Clock 10pF load capacitance
to Data Valid)
Data Pipeline delay
Falling edge of OEB to digital
output valid data
Rising edge of OEB to digital
output tri-state
Test conditions
Min
0.5
45
18
18
50
20
20
5
6.5
1
1
Typ
Max
25
55
Unit
MHz
%
ns
ns
ns
cycles
ns
ns
TIMING DIAGRAM
N+4
N+3
N+5
N+6
N+2
N-1
N
N+1
N+7
N+8
CLK
6.5 clk cycles
OEB
Tod
Toff
N-7
N-6
N-5
N-4
N-3
N-2
N
Ton
N+1
DATA
OUT
N-8
DR
HZ state
4/19
TSA1001
CONDITIONS:
AVCC = DVCC = VCCB = 2.5V, Fs= 25Msps, Fin= 1MHz, Vin@ -1.0dBFS, VREFM= 0V
Tamb = 25°C (unless otherwise specified)
ANALOG INPUTS
Symbol
Parameter
Test conditions
Min
Typ
2.0
7.
Vin@Full Scale, FS=25Msps
100
60
Max
Unit
Vpp
pF
MHz
MHz
VIN-VINB Full scale reference voltage
Cin
BW
ERB
Input capacitance
Analog Input Bandwitdh
Effective Resolution Bandwidth
1)
1). See parameters definition for more information
REFERENCE VOLTAGE
Symbol
VREFP
Parameter
Top internal reference voltage
Test conditions
Min
0.91
Tmin= -40°C to Tmax= 85°C
1)
0.90
1.20
Vpol
Ipol
Ipol
VINCM
Analog bias voltage
Analog bias current
Analog bias current
Input common mode voltage
Tmin= -40°C to Tmax= 85°C
1)
Normal operating mode
Shutdown mode
0.48
Tmin= -40°C to Tmax= 85°C
1)
0.48
1.19
25
50
0
0.57
0.65
0.66
1.27
Typ
1.03
Max
1.15
1.16
1.35
1.36
70
Unit
V
V
V
V
µA
µA
V
V
1). Not fully tested over the temperature range. Guaranted by sampling.
5/19
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