) is the time from a valid stop condition of a write sequence to the end of the internal erase/program cycle. During the write cycle,
the NM24Cxx bus interface circuits are disabled, SDA is allowed to remain high per the bus-level pull-up resistor, and the device does not respond to its slave ad-
dress.
Bus Timing
DS012588-8
System Layout
DS012588-20
Note:
Due to open drain configuration of SDA, a bus-level pull-up resistor is called for (typical value = 4.7 kΩ).
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