EEWORLDEEWORLDEEWORLD

Part Number

Search

54112-802281250LF

Description
Board Stacking Connector, 28 Contact(s), 2 Row(s), Male, Straight, Solder Terminal, ROHS COMPLIANT
CategoryThe connector    The connector   
File Size67KB,1 Pages
ManufacturerAmphenol
Websitehttp://www.amphenol.com/
Environmental Compliance  
Download Datasheet Parametric View All

54112-802281250LF Overview

Board Stacking Connector, 28 Contact(s), 2 Row(s), Male, Straight, Solder Terminal, ROHS COMPLIANT

54112-802281250LF Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerAmphenol
package instructionROHS COMPLIANT
Reach Compliance Codecompliant
Connector typeBOARD STACKING CONNECTOR
Contact to complete cooperationGOLD (15) OVER NICKEL (50)/GOLD FLASH OVER PALLADIUM NICKEL (50)
Contact completed and terminatedMATTE TIN (79) OVER NICKEL (50)
Contact point genderMALE
Contact materialPHOSPHOR BRONZE
DIN complianceNO
Filter functionNO
IEC complianceNO
JESD-609 codee3
MIL complianceNO
Manufacturer's serial number54112
Mixed contactsNO
Installation methodSTRAIGHT
Installation typeBOARD
Number of rows loaded2
OptionsGENERAL PURPOSE
Terminal pitch2.54 mm
Termination typeSOLDER
Total number of contacts28
UL Flammability Code94V-0
PDM: Rev:G
STATUS:
Released
Printed: Feb 20, 2009
.
[Repost] We love technology as much as we love life - Los Angeles Windows Hardware Engineering Conference (serial)
First photo: Our Festival As an avid hardware enthusiast, I started paying attention to the WinHEC conference in the United States when I was in high school. Today, I finally have the opportunity to a...
副团长夫人 Talking
Help with understanding of FPGA generating FSK modulation signal
( 5 ) Both channels can generate FSK modulation waves. The frequency of the internal modulation signal is no more than 10Hz , the upper side frequency is 12kHz , and the lower side frequency is 8kHz ;...
523335234 FPGA/CPLD
Ultrasound ECG Medical Electronics Related Information Sharing
Study materials and papers, share with everyone. [[i] This post was last edited by smart_shan on 2013-9-2 09:25 [/i]]...
smart_shan Medical Electronics
Is the '*' symbol in Verilog considered a multiplier?
Does a '*' in a Verilog formula mean that a multiplier is used? If there is a '*' sign in the array, does it count as using a multiplier? The following statement: ref_line0_data[0*36+:36];...
1nnocent FPGA/CPLD
【Qinheng RISC-V core CH582】Evaluation summary
According to the submitted evaluation plan: 1. Unboxing and hardware appreciation 2. Development environment construction and data collection and download 3. Official routine evaluation of the develop...
kit7828 Domestic Chip Exchange
AVR MCU proteus simulation
The source file (c file) cannot be downloaded during simulation. Please help....
加油费 Microchip MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1558  959  1105  2014  2572  32  20  23  41  52 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号