VS1664648041BTGA-8L datasheet, PDF

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VS1664648041BTGA-8L: DescriptionSynchronous DRAM Module, 16MX64, 6ns, CMOS, DIMM-168; Categorystorage storage; File Size188KB，15 Pages; ManufacturerVanguard International Semiconductor Corporation; Websitehttp://www.vis.com.tw/

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VS1664648041BTGA-8L Overview

Synchronous DRAM Module, 16MX64, 6ns, CMOS, DIMM-168

VS1664648041BTGA-8L Parametric

Parameter Name	Attribute value
Maker	Vanguard International Semiconductor Corporation
Parts packaging code	DIMM
package instruction	DIMM,
Contacts	168
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
Maximum access time	6 ns
Other features	AUTO/SELF REFRESH
JESD-30 code	R-XDMA-N168
memory density	1073741824 bit
Memory IC Type	SYNCHRONOUS DRAM MODULE
memory width	64
Number of functions	1
Number of ports	1
Number of terminals	168
word count	16777216 words
character code	16000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	16MX64
Package body material	UNSPECIFIED
encapsulated code	DIMM
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Certification status	Not Qualified
self refresh	YES
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal location	DUAL

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VIS

Description

Preliminary

VS864648041B,VS1664648041B

8M,16MX64-Bit

SDRAM Module

The VS864648041B and VS1664648041B are 8M x 64 bit and 16M bit x 64 Dual-In-Line synchronous

DRAM Module (DIMM). It consists of 8/16 CMOS 8Mx8 bit synchronous DRAMs (VG36648041BT) with 4

banks and in standard 54 pin TSOP-II package. Decoupling capacitors are mounted on power supply line for

noise reduction. The module use serial presence detects implemented via a 2K-bit EEPROM component.

Features

VS864648041B, VS1664648041B :

• Comply to Intel PC100 specification

• Single 3.3V (

0.3V

) power supply

• Utilizes -8H, -8L and -10 SDRAM components

• 8M x 64 bit (VS864648041B) and 16M x 64 bit (VS1664648041B) options

• Fully synchronous with all signals referenced to a positive clock edge

• Non-Buffered

• Programmable burst length (1,2,4,8 & Full page)

• Programmable wrap sequence (Sequential/Interleave)

• Automatic precharge and controlled precharge

• Auto refresh and self refresh modes

• I/O level : LVTTL interface

• Random column access in every cycle

• 4096 refresh cycles / 64ms

• Serial Presence Detect (SPD) with EEPROM

• JEDEC standard pinout

• Performance Options (at 100MHz; units: clock)

Marking

-8H

-8L

-10

SDRAMs

-8H

-8L

-10

RCD

Document:1G5-0115

Rev.4

Page 1

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