FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output
October 2011
FAN3850T
Microphone Pre-Amplifier with Temperature
Compensation and Digital Output
Features
Optimized for Mobile Handset and Notebook PC
Microphone Applications
Accepts Input from Electret Condenser Microphones
Pulse Density Modulation (PDM) Output
Standard 5-Wire Digital Interface
Amplifier Gain: 15.7dB
Negative Temperature Coefficient to Compensate for
ECM Positive Temperature Coefficient
Low Input Capacitance, High PSR, 20kHz
Pre-Amplifier
Low-Power, 1.5µA Sleep Mode
Typical 420µA Supply Current
Signal to Noise Ratio of 62.4dB(A)
Total Harmonic Distortion: 0.01%
Input Clock Frequency Range of 1-4MHz
Integrated Low Drop-Out Regulator (LDO)
Small 1.26mm x 0.86mm 6-Ball WLCSP
INPUT
Pre-Amp
Description
The FAN3850T integrates a pre-amplifier, LDO, and
Analog-to-Digital Converter (ADC) to convert Electret
Condenser Microphone (ECM) outputs to digital Pulse
Density Modulation (PDM) data streams. The pre-
amplifier accepts analog signals from the ECM and drives
an over-sampled sigma delta ADC and outputs PDM
data. The PDM digital audio has the advantage of noise
rejection and interface-to-mobile handset processors.
The FAN3850T is powered from the system supply rails
up to 3.63V, with a low power consumption of only
0.85mW, and less than 20μW in Power-Down Mode.
The device compensates for the temperature variation
of the microphone element to achieve a flat sensitivity
response over-temperature.
LDO
Sleep
Mode Ctrl
ADC
GND
CLOCK
DATA
SELECT
Applications
Electret Condenser Microphones with Digital Output
Mobile Handsets
Headset Accessories
Personal Computers (PC)
Figure 1. Block Diagram
Ordering Information
Part Number
FAN3850TUC15X35
Gain
Option
15.7dB
Operating
Temperature Range
-30°C to +85°C
Package
6-Ball, Wafer-Level Chip-Scale
Package (WLCSP)
Packing
Method
3000 Unit
Tape & Reel
Note:
1. Alternate gain options and temperature coefficient slopes are possible. Please contact a Fairchild representative.
© 2011 Fairchild Semiconductor Corporation
FAN3850T • Rev. 3.0.0
www.fairchildsemi.com
FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output
Pin Configuration
Figure 2. Pin Configuration (Top View)
Pin Definitions
Pin#
A1
B1
C1
A2
B2
C2
Name
CLOCK
GND
DATA
SELECT
INPUT
VDD
Type
Input
Input
Output
Input
Input
Input
Clock Input
Ground Pin
PDM Output – 1-Bit ADC
Description
Rising or Falling Clock-Edge Select
Microphone Input
Device Power Pin
© 2011 Fairchild Semiconductor Corporation
FAN3850T • Rev. 3.0.0
www.fairchildsemi.com
2
FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Symbol
V
DD
V
IO
ESD
Parameter
DC Supply Voltage
Analog and Digital I/O
Human Body Model, JESD22-A114
(2)
,
All Pins Except Microphone Input
Human Body Model, JESD22-A114
(2)
,
Microphone Input
Min.
-0.3
-0.3
±7
±300
Max.
4.0
V
CC
+0.3
Unit
V
V
kV
V
Note:
2. This device is fabricated using CMOS technology and is therefore susceptible to damage from electrostatic
discharges. Appropriate precautions must be taken during handling and storage of this device to prevent
exposure to ESD.
Reliability Information
Symbol
T
J
T
STG
T
REFLOW
JA
Parameter
Junction Temperature
Storage Temperature Range
Peak Reflow Temperature
Thermal Resistance, JEDEC Standard,
Multilayer Test Boards, Still Air
Min.
-65
Typ.
Max.
+150
+125
+260
Unit
°C
°C
°C
°C/W
90
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
T
A
V
DD
t
RF-CLK
Parameter
Operating Temperature Range
Supply Voltage Range
Clock Rise and Fall Time
Min.
-30
1.64
Typ.
1.80
Max.
+85
3.63
10
Unit
°C
V
ns
© 2011 Fairchild Semiconductor Corporation
FAN3850T • Rev. 3.0.0
www.fairchildsemi.com
3
FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output
Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for T
A
=25°C, V
DD
=1.8V, V
IN
=94dB (SPL), f
CLK
=2.4MHz,
duty cycle = 50%, and C
MIC
=15pF.
Symbol
V
DD
I
DD
I
SLEEP
PSR
IN
NOM
SNR
e
N
THD
THD+N
tc
C
IN
R
IN
V
IL
V
IH
V
OL
V
OH
V
IN15dB
V
OUT
Parameter
Supply Voltage Range
Supply Current
Sleep Mode Current
Power Supply Rejection
Nominal Sensitivity
(4)
(7)
Condition
INPUT=AC Coupled to GND,
CLOCK=On, No Load
f
CLK
=GND
INPUT=AC Coupled to GND, Test
Signal on V
DD
=217Hz Square
Wave and Broad Band Noise
(3)
both 100mV
P-P
INPUT=94dBSPL
f
IN
=1kHz 1Pa, A-Weighted
20Hz to 20kHz, A-Weighted
15.7dB Gain
(5)
Min.
1.64
Typ.
1.80
420
1.4
-80
-26
62.4
5.3
0.01
0.2
1.0
5.0
-0.035
0.2
Max.
3.63
Unit
V
μA
8.0
μA
dBFS
dBFS
dB(A)
Signal-to-Noise Ratio
Input Referred Noise
(7)
Total Harmonic Distortion
THD and Noise
(7)
8.6
0.10
1.0
5.0
10.0
µV
RMS
%
%
dB/˚C
pF
GΩ
f
IN
=1kHz, INPUT=-26dBFS
50Hz
≤
f
IN
≤
1kHz, INPUT=-20dBFS
f
IN
=1kHz, INPUT=-5dBFS
f
IN
=1kHz, INPUT=0dBFS
Temperature Coefficient
Input Capacitance
(7,11)
(7,11)
Gain Measured at 50˚C and -10˚C
INPUT
INPUT
>100
Input Resistance
(7,11)
CLOCK & SELECT Input,
Logic LOW Level
CLOCK & SELECT Input,
Logic HIGH Level
Data Output, Logic LOW
Level
Data Output, Logic HIGH
Level
Maximum Input Signal for
(5)
15.7dB of Gain
Acoustic Overload Point
(11)
0.3
1.5
V
DD
+0.3
0.35×V
DD
0.65×V
DD
f
IN
=1 kHz, THD+N < 10%;
DC Level=0V
THD < 10%
120
503
V
V
V
V
mV
PP
dBSPL
Continued on the following page…
© 2011 Fairchild Semiconductor Corporation
FAN3850T • Rev. 3.0.0
www.fairchildsemi.com
4
FAN3850T — Microphone Pre-Amplifier with Temperature Compensation and Digital Output
Electrical Characteristics
(Continued)
Unless otherwise specified, all limits are guaranteed for T
A
=25°C, V
DD
=1.8V, V
IN
=94dB (SPL), f
CLK
=2.4MHz,
duty cycle = 50%, and C
MIC
=15pF.
Symbol
t
A
t
B
t
A
t
B
f
CLK
CLK
dc
t
WAKEUP
t
FALLASLEEP
Parameter
Time from CLOCK Transition
to Data Becoming Valid
Time from CLOCK Transition
to Data Becoming Hi-Z
Time from CLOCK Transition
to Data Becoming Valid
Time from CLOCK Transition
to Data Becoming Hi-Z
Input CLOCK Frequency
(8)
CLOCK Duty Cycle
(7)
Wake-Up Time
(9)
Fall-Asleep Time
(10)
Condition
On Falling Edge of CLOCK,
SELECT=GND, C
LOAD
=15pF
On Rising Edge of CLOCK,
SELECT=GND, C
LOAD
=15pF
On Rising Edge of CLOCK,
SELECT=V
DD
, C
LOAD
=15pF
On Falling Edge of CLOCK,
SELECT=V
DD
, C
LOAD
=15pF
Active Mode
f
CLK
=2.4MHz
f
CLK
=2.4MHz
Min.
18
0
18
0
1.0
40
0
Typ.
43
5
56
5
2.4
50
0.35
0.01
Max.
Unit
ns
16
ns
ns
16
4.0
60
2.00
1.00
ns
MHz
%
ms
ms
C
LOAD
Load Capacitance on Data
100
pF
Notes:
3. Pseudo-random noise with triangular probability density function. Bandwidth up to 10MHz.
4. Assumes 120dB(SPL) is mapped to 0Dbfs.
5. Assumes an input -41, or -38dBV, depending on the part-specific gain.
6. Verified by design simulation, showing idle tones and low noise level modulation to be typical 96dB.
7. Guaranteed by characterization.
8. All parameters are tested at 2.4MHz. Frequency range guaranteed by characterization.
9. Device wakes up when f
CLK
≥
300kHz.
10. Device falls asleep when f
CLK
≤
70kHz.
11. Guaranteed by design.
12. Temperature coefficient is calculated by measuring gain in db at 50˚C and -10°C and dividing by 60 (Gain(50°C)
– Gain(-10°C)/60).
Figure 3. Interface Timing
© 2011 Fairchild Semiconductor Corporation
FAN3850T • Rev. 3.0.0
www.fairchildsemi.com
5
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