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LC662508A(DIP64)

Description
Microcontroller, 4-Bit, MROM, LC66000 CPU, 4.2MHz, CMOS, PDIP64
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size152KB,17 Pages
ManufacturerSANYO
Websitehttp://www.semic.sanyo.co.jp/english/index-e.html
Download Datasheet Parametric Compare View All

LC662508A(DIP64) Overview

Microcontroller, 4-Bit, MROM, LC66000 CPU, 4.2MHz, CMOS, PDIP64

LC662508A(DIP64) Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerSANYO
package instructionSDIP, SDIP64,.75
Reach Compliance Codeunknown
bit size4
CPU seriesLC66000
JESD-30 codeR-PDIP-T64
JESD-609 codee0
Number of terminals64
Maximum operating temperature70 °C
Minimum operating temperature-30 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSDIP
Encapsulate equivalent codeSDIP64,.75
Package shapeRECTANGULAR
Package formIN-LINE, SHRINK PITCH
power supply3.3/5 V
Certification statusNot Qualified
RAM (bytes)256
rom(word)8192
ROM programmabilityMROM
speed4.2 MHz
surface mountNO
technologyCMOS
Temperature levelOTHER
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch1.78 mm
Terminal locationDUAL

LC662508A(DIP64) Preview

Ordering number : EN5997
CMOS IC
LC662508A, 662512A, 662516A
Four-Bit Single-Chip Microcontrollers
with 8, 12, and 16 KB of On-Chip ROM
Overview
The LC662516A, LC662512A, and LC662508A are 4-bit
CMOS microcontrollers that integrate on a single chip all
the functions required in a special-purpose telephone
controller, including ROM, RAM, I/O ports, a serial
interface, a DTMF generator, timers, and interrupt
functions. These microcontrollers are available in a 64-pin
package.
Features and Functions
• On-chip ROM capacities of 8, 12, and 16 kilobytes, and
an on-chip RAM capacity of 512
×
4 bits.
• Fully supports the LC66000 Series common instruction
set (128 instructions).
• I/O ports: 58 pins
• DTMF generator
This microcontroller incorporates a circuit that can
generate two sine wave outputs, DTMF output, or a
melody output for software applications.
• 8-bit serial interface: Two-wire interface (16-bit data
length. Supports cascade connection.)
• Instruction cycle time: 0.95 to 10 µs (at 3.0 to 5.5 V)
• Powerful timer functions and prescalers
— Time limit timer, event counter, pulse width
measurement, and square wave output using a 12-bit
timer.
— Time limit timer, event counter, PWM output, and
square wave output using an 8-bit timer.
— Time base function using a 12-bit prescaler.
Powerful interrupt system with 11 interrupt factors and 8
interrupt vector locations.
— External interrupts: 3 factors/3 vector locations
— Internal interrupts: 8 factors/5 vector locations
(Waveform output internal interrupts: 3 factors and 1
vector; shared with external expansion interrupts)
Flexible I/O functions
Selectable options include 20mA drive outputs, inverter
circuits, pull-up and open drain circuits.
Optional runaway detection function (watchdog timer)
8-bit I/O functions
Power saving functions using halt and hold modes.
Packages: DIP64S, QIP64E (QFP64E)
Evaluation ICs: LC665099 (evaluation chip) +
EVA86K-ECB662500
LC66E2516(on-chip EPROM microcontroller)
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
O1698RM (OT) No. 5997-1/17
LC662508A, 662512A, 662516A
Package Dimensions
unit: mm
3071-DIP64S
[LC662508A,12A,16A]
unit: mm
3159-QFP64E
[LC662508A,12A,16A]
SANYO: DIP64S
SANYO: QFP64E
Series Organization
Type No.
LC66304A/306A/308A
LC66404A/406A/408A
LC66506B/508B/512B/516B
LC66354A/356A/358A
LC66354S/356S/358S
LC66556A/558A/562A/566A
LC66354B/356B/358B
LC66556B/558B/562B/566B
LC66354C/356C/358C
LC662104A/06A/08A
LC662304A/06A/08A/12A/16A
LC662508A/12A/16A
LC665304A/06A/08A/12A/16A
LC66E308
LC66P308
LC66E408
LC66P408
LC66E516
LC66P516
LC66E2108
LC66E2316
LC66E2516
LC66E5316
LC66P2108
LC66P2316
LC66P2516
LC66P5316
No. of
pins
42
42
64
42
42
64
42
64
42
30
42
64
48
42
42
42
42
64
64
30
42
64
52/48
30
42
64
48
ROM capacity
4 K/6 K/8 KB
4 K/6 K/8 KB
6 K/8 K/12 K/16 KB
4 K/6 K/8 KB
4 K/6 K/8 KB
6 K/8 K/12 K/16 KB
4 K/6 K/8 KB
6 K/8 K/12 K/16 KB
4 K/6 K/8 KB
4 K/6 K/8 KB
RAM
capacity
512 W
512 W
512 W
512 W
512 W
512 W
512 W
512 W
512 W
384 W
DIP64S
DIP42S
DIP64S
DIP42S
DIP30SD
DIP42S
DIP64S
DIP48S
DIC42S
with window
DIP42S
DIC42S
with window
DIP42S
DIC64S
with window
DIP64S
DIP42S
DIP42S
DIP64S
DIP42S
Package
QFP48E
QFP48E
QFP64A
QFP48E
QFP44M
QFP64E
QFP48E
QFP64E
QFP48E
MFP30S
QFP48E
QFP64E
QFP48E
QFC48
with window
QFP48E
QFC48
with window
QFP48E
QFC64
with window
QFP64E
Window and OTP evaluation versions
4.5 to 5.5 V/0.92 µs
Dual oscillator support
3.0 to 5.5 V/0.95 µs
On-chip DTMF generator versions
3.0 to 5.5 V/0.95 µs
Low-voltage versions
2.2 to 5.5 V/3.92 µs
Low-voltage high-speed versions
3.0 to 5.5 V/0.92 µs
2.5 to 5.5 V/0.92 µs
Normal versions
4.0 to 6.0 V/0.92 µs
Features
4 K/6 K/8 K/12 K/16 KB 512 W
8 K/12 K/16 KB
512 W
4 K/6 K/8 K/12 K/16 KB 512 W
EPROM 8 KB
OTPROM 8 KB
EPROM 8 KB
OTPROM 8 KB
EPROM 16 KB
OTPROM 16 KB
EPROM 8 KB
EPROM 16 KB
EPROM 16 KB
EPROM 16 KB
OTPROM 8 KB
OTPROM 16 KB
OTPROM 16 KB
OTPROM 16 KB
512 W
512 W
512 W
512 W
512 W
512 W
384 W
512 W
512 W
512 W
384 W
512 W
512 W
512 W
DIC42S
with window
DIC64S
with window
DIC52S
with window
DIP30SD
DIP42S
DIP64S
DIP48S
QFC48
with window
QFC64
with window
QFC48
with window
MFP30S
QFP48E
QFP64E
QFP48E
Window evaluation versions
4.5 to 5.5 V/0.92 µs
OTP
4.0 to 5.5 V/0.95 µs
No. 5997-2/17
LC662508A, 662512A, 662516A
Pin Assignments
DIP64S
QFP64E
Top view
We recommend the use of reflow-soldering techniques to solder-mount QFP packages.
Please consult with your Sanyo representative for details on process conditions if the package itself is to be directly
immersed in a dip-soldering bath (dip-soldering techniques).
No. 5997-3/17
LC662508A, 662512A, 662516A
System Block Diagram
• When DT, ML, and DP are used, only the SIO channel can be used for serial I/O.
• The INT3, INT4, and INT5 pins can be used with internal functions.
Differences between the LC665XX Series and the LC6625XX Series
Item
System differences
• Hardware wait time (number of
cycles) when hold mode is cleared
LC6650XB Series
(Including the LC66599 evaluation chip)
65536 cycles
About 64 ms at 4 MHz (Tcyc = 1 µs)
LC6655XB Series
16384 cycles
About 16 ms at 4 MHz (Tcyc = 1 µs)
LC6625XX Series
16384 cycles
About 16 ms at 4 MHz (Tcyc = 1 µs)
• Value of timer 0 after a reset
(Including the value after hold mode Set to FF0.
is cleared)
• DTMF generator
• Inverter array
• Three-value inputs/comparator
inputs
• Three-state output from P31
and P32
• Using P0 to clear halt mode
• External extended interrupts
None (Tools are handled with
external devices.)
None (Tools are handled with
external devices.)
Yes
None
In 4-bit groups
For INT3, INT4, and INT5.
(Tools are handled with external
devices.)
Shared with P90 (INT2)
(Tools are handled with external
devices.)
• LC66506B/08B/12B/16B
4.0 to 6.0 V/0.92 to 10 µs
• LC66E516/P516
4.5 to 5.5 V/0.92 to 10 µs
P0, P1, P4, and P5: about 3 to 10 kΩ
• P2, P3, P6, P7, and PA:
15V handling
• Others: Normal voltage
Set to FFC.
Set to FFC.
None
None
Yes
None
In 4-bit groups
For INT3, INT4, and INT5.
Yes
Yes
None
Yes
Can be specified for each bit.
INT3, INT4, and INT5 can be used
with the internal functions.
• INT2 functions
Shared with P90 (INT2)
• 3.0 to 5.5 V/0.92 to 10 µs
• LC6655XA, 56XA
2.2 to 5.5 V/3.92 to 10 µs
3.0 to 5.5 V/1.96 to 10 µs
P0, P1, P4, and P5: about 3 to 10 kΩ
• P2, P3, P6, P7, and PA:
15V handling
• Others: Normal voltage
Shared with P53 (INT2)
Differences in main characteristics
• Operating power-supply voltage
and operating speed (cycle time)
• Pull-up resistors
3.0 to 5.5 V/0.95 to 10 µs
P0, P1, P4, and P5: about 100 kΩ
P2, P3, P61, P63, and PA:
15V voltage handling
Others: normal voltage
• Port voltage handling
No. 5997-4/17
LC662508A, 662512A, 662516A
Pin Function Overview
Pin
I/O
Overview
Output driver type
Options
State after a Standby mode
reset
operation
Hold mode:
Output off
High or low
(option)
Halt mode:
Output
retained
Hold mode:
Output off
High or low
(option)
Halt mode:
Output
retained
P00
P01
P02
P03
I/O
I/O ports P00 to P03
• Input or output in 4-bit or 1-bit units
• P00 to P03 support the halt mode
control function (This function can be
specified in bit units.)
• Pch: Pull-up MOS type
• Nch: Intermediate sink current
type
• Pull-up MOS or
Nch OD output
• Output level on
reset
P10
P11
P12
P13
I/O
I/O ports P10 to P13
Input or output in 4-bit or 1-bit units
• Pch: Pull-up MOS type
• Nch: Intermediate sink current
type
• Pull-up MOS or
Nch OD output
• Output level on
reset
P20/SI0
P21/SO0
P22/SCK0
P23/INT0
I/O
I/O ports P20 to P23
• Input or output in 4-bit or 1-bit units
• P20 is also used as the serial input SI0
pin.
• P21 is also used as the serial output
SO0 pin.
• P22 is also used as the serial clock
SCK0 pin.
• P23 is also used as the INT0 interrupt
request pin, and also as the timer 0
event counting and pulse width
measurement input.
I/O ports P30 to P32
• Input or output in 3-bit or 1-bit units
• P30 is also used as the INT1 interrupt
request.
• P31 is also used for the square wave
output from timer 0.
• P32 is also used for the square wave
and PWM output from timer 1.
• P31 and P32 also support 3-state
outputs.
• Pch: CMOS type
• Nch: Intermediate sink current
type
• Nch: +15V handling when OD
option selected
Hold mode:
Output off
CMOS or Nch OD
output
H
Halt mode:
Output
retained
P30/INT1
P31/POUT0
P32/POUT1
I/O
• Pch: CMOS type
• Nch: Intermediate sink current
type
• Nch: +15V handling when OD
option selected
Hold mode:
Output off
CMOS or Nch OD
output
H
Halt mode:
Output
retained
P33/HOLD
I
Hold mode control input
• Hold mode is set up by the HOLD
instruction when HOLD is low.
• In hold mode, the CPU is restarted by
setting HOLD to the high level.
• This pin can be used as input port P33
along with P30 to P32.
• When the P33/HOLD pin is at the low
level, the CPU will not be reset by a
low level on the RES pin. Therefore,
applications must not set P33/HOLD
low when power is first applied.
P40/INV0I
P41/INV0O
P42/INV1I
P43/INV1O
I/O
I/O ports P40 to P43
• Input or output in 4-bit or 1-bit units
• Input or output in 8-bit units when used
in conjunction with P50 to P53.
• Can be used for output of 8-bit ROM
data when used in conjunction with
P50 to P53.
• Dedicated inverter circuit (option)
• Pch: Pull-up MOS type
• CMOS type when the inverter
circuit option is selected
• Nch: Intermediate sink current
type
• Pull-up MOS or
Nch OD output
• Output level on
reset
• Inverter circuit
High or low
or inverter
I/O (option)
Hold mode:
Port output
off, inverter
output off
Halt mode:
Port output
retained,
inverter
output
continues
Continued on next page.
No. 5997-5/17

LC662508A(DIP64) Related Products

LC662508A(DIP64) LC662508A(QFP64) LC662512A(QFP64) LC662516A(DIP64)
Description Microcontroller, 4-Bit, MROM, LC66000 CPU, 4.2MHz, CMOS, PDIP64 Microcontroller, 4-Bit, MROM, LC66000 CPU, 4.2MHz, CMOS, PQFP64 Microcontroller, 4-Bit, MROM, LC66000 CPU, 4.2MHz, CMOS, PQFP64 Microcontroller, 4-Bit, MROM, LC66000 CPU, 4.2MHz, CMOS, PDIP64
Is it Rohs certified? incompatible incompatible incompatible incompatible
Maker SANYO SANYO SANYO SANYO
package instruction SDIP, SDIP64,.75 QFP, QFP64,.66SQ,32 QFP, QFP64,.66SQ,32 SDIP, SDIP64,.75
Reach Compliance Code unknown unknown unknown unknown
bit size 4 4 4 4
CPU series LC66000 LC66000 LC66000 LC66000
JESD-30 code R-PDIP-T64 S-PQFP-G64 S-PQFP-G64 R-PDIP-T64
JESD-609 code e0 e0 e0 e0
Number of terminals 64 64 64 64
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C
Minimum operating temperature -30 °C -30 °C -30 °C -30 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SDIP QFP QFP SDIP
Encapsulate equivalent code SDIP64,.75 QFP64,.66SQ,32 QFP64,.66SQ,32 SDIP64,.75
Package shape RECTANGULAR SQUARE SQUARE RECTANGULAR
Package form IN-LINE, SHRINK PITCH FLATPACK FLATPACK IN-LINE, SHRINK PITCH
power supply 3.3/5 V 3.3/5 V 3.3/5 V 3.3/5 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
RAM (bytes) 256 256 256 256
rom(word) 8192 8192 12288 16384
ROM programmability MROM MROM MROM MROM
speed 4.2 MHz 4.2 MHz 4.2 MHz 4.2 MHz
surface mount NO YES YES NO
technology CMOS CMOS CMOS CMOS
Temperature level OTHER OTHER OTHER OTHER
Terminal surface Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form THROUGH-HOLE GULL WING GULL WING THROUGH-HOLE
Terminal pitch 1.78 mm 0.8 mm 0.8 mm 1.78 mm
Terminal location DUAL QUAD QUAD DUAL
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