NM93C06LZ/C46LZ/C56LZ/C66LZ 256-/1024-/2048-/4096-Bit Serial EEPROM with Zero Power and
Extended Voltage (2.7V to 5.5V) (MICROWIRE Bus Interface)
NM93C06LZ/C46LZ/C56LZ/C66LZ
March 1997
NM93C06LZ/C46LZ/C56LZ/C66LZ
256-/1024-/2048-/4096-Bit Serial EEPROM with Zero
Power and Extended Voltage (2.7V to 5.5V)
(MICROWIRE
™
Bus Interface)
General Description
The NM93C06LZ/C46LZ/C56LZ/C66LZ devices are 256/
1024/2048/4096 bits respectively, of CMOS non-volatile
electrically erasable memory divided into 16/64/128/256
16-bit registers. They are fabricated using Fairchild Semi-
conductor’s floating-gate CMOS process for high reliability
and low power consumption. These memory devices are
available in both SO and TSSOP packages for small space
considerations.
The serial interface that operates these EEPROMs is MI-
CROWIRE compatible for simple interface to standard mi-
crocontrollers and microprocessors. There are 7 instructions
that control these devices: Read, Erase/Write Enable, Erase,
Erase All, Write, Write All, and Erase/Write Disable. The
ready/busy status is available on the DO pin to indicate the
completion of a programming cycle.
Features
n
n
n
n
n
n
n
n
n
n
n
Less than 1.0 µA standby current
2.7V–5.5V operation in all modes
Typical active current of 100 µA
Direct write: no erase before program
Reliable CMOS floating gate technology
MICROWIRE compatible serial I/O
Self-timed programming cycle
Device status indication during programming mode
40 years data retention
Endurance: 10
6
data changes
Packages available: 8-pin SO, 8-pin DIP, 8-pin TSSOP
Block Diagram
DS011778-1
© 1997 Fairchild Semiconductor Corporation
DS011778
www.fairchildsemi.com
1
PrintDate=1997/08/15 PrintTime=11:24:09 7630 ds011778 Rev. No. 3
cmserv
Proof
1
Connection Diagram
Dual-In-Line Package (N)
8-Pin SO (M8) and 8-Pin TSSOP (MT8)
Pin Names
Pin
CS
SK
DI
DO
GND
V
CC
Description
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
Power Supply
DS011778-2
Top View
See Package Number
N08E and M08A
Ordering Information
Commercial Temperature Range (0˚C to +70˚C)
Order Number
NM93C06LZN/NM93C46LZN
NM93C56LZN/NM93C66LZN
NM93C06LZM8/NM93C46LZM8
NM93C56LZM8/NM93C66LZM8
NM93C06LZMT8/NM93C46LZMT8
NM93C56LZMT8/NM93C66LZMT8
Extended Temperature Range (−40˚C to +85˚C)
Order Number
NM93C06LZEN/NM93C46LZEN
NM93C56LZEN/NM93C66LZEN
NM93C06LZEM8/NM93C46LZEM8
NM93C56LZEM8/NM93C66LZEM8
NM93C06LZEMT8/NM93C46LZEMT8
NM93C56LZEMT8/NM93C66LZEMT8
Automotive Temperature Range (−40˚C to +125˚C)
Order Number
NM93C06LZVN/NM93C46LZVN
NM93C56LZVN/NM93C66LZVN
NM93C06LZVM8/NM93C46LZVM8
NM93C56LZVM8/NM93C66LZVM8
NM93C06LZVMT8/NM93C46LZVMT8
NM93C56LZVMT8/NM93C66LZVMT8
www.fairchildsemi.com
2
PrintDate=1997/08/15 PrintTime=11:24:10 7630 ds011778 Rev. No. 3 cmserv
Proof
2
LOW VOLTAGE (2.7V
≤
V
CC
≤
4.5V) SPECIFICATIONS
Operating Conditions
Absolute Maximum Ratings
(Note 1)
Ambient Storage Temperature
All Input or Output Voltage
with Respect to Ground
Lead Temperature
(Soldering, 10 sec.)
ESD Rating
−65˚C to +150˚C
V
CC
+ 1 to −0.3V
+300˚C
2000V
Ambient Operating Temperature
NM93C06LZ/46LZ/56LZ/66LZ
NM93C06LZE/46LZE/56LZE/66LZE
NM93C06LZV/46LZV/56LZV/66LZV
Power Supply (V
CC
) Range
0˚C to +70˚C
−40˚C to +85˚C
−40˚C to +125˚C
2.7V to 4.5V
DC and AC Electrical Characteristics
Symbol
I
CC1
I
CC3
I
IL
I
OL
V
IL2
V
IH2
V
OL2
V
OH2
f
SK
t
SKH
t
SKL
t
SKS
t
CS
t
CSS
t
DH
t
DIS
t
CSH
t
DIH
t
PD1
t
PD0
t
SV
t
DF
t
WP
Parameter
Operating Current
CMOS Input Levels
Standby Current
Input Leakage
Output Leakage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
SK Clock Frequency
SK High Time
SK Low Time
SK Setup Time
Minimum CS Low Time
CS Setup Time
DO Hold Time
DI Setup Time
CS Hold Time
DI Hold Time
Output Delay to “1”
Output Delay to “0”
CS to Status Valid
CS to DO
in
TRI-STATE
®
Write Cycle Time
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
AC Test
CS = V
IL
V
CC
= 2.7V
AC Test
AC Test
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
Relative to SK
Relative to SK
AC Test
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
Relative to SK
Relative to SK
Relative to SK
(Note xx)
Relative to CS
(Note 2)
(Note 2)
Part Number
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
2.7V
≤
V
CC
≤
4.5V
2.7V
≤
V
CC
≤
4.5V
I
OL
= 10 µA
I
OH
= −10 µA
−0.1
0.8 V
CC
0.9 V
CC
0
0
1
1
1
1
50
50
1
1
0.2
0.2
70
0.4
0.4
0
0.4
2
2
2
2
1
1
0.4
0.4
15
ms
µs
µs
µs
µs
µs
µs
ns
µs
µs
µs
µs
µs
250
250
µs
0.15 V
CC
V
CC
+ 1
0.2
V
V
V
V
kHz
V
IN
= 0V to V
CC
−100
+100
nA
V
IN
= 0V to V
CC
−100
CS = 0V
Conditions
CS = V
IH
, SK = 250 kHz
Min
Max
1
1
1
1
+100
nA
µA
Units
mA
3
www.fairchildsemi.com
PrintDate=1997/08/15 PrintTime=11:24:11 7630 ds011778 Rev. No. 3 cmserv
Proof
3
STANDARD VOLTAGE (4.5V
≤
V
CC
≤
5.5V) SPECIFICATIONS
Operating Conditions
Absolute Maximum Ratings
(Note 1)
Ambient Storage Temperature
All Input or Output Voltage
with Respect to Ground
Lead Temperature
(Soldering, 10 sec.)
ESD Rating
−65˚C to +150˚C
V
CC
+ 1 to −0.3V
+300˚C
2000V
Ambient Operating Temperature
NM93C06LZ/46LZ/56LZ/66LZ
NM93C06LZE/46LZE/56LZE/66LZE
NM93C06LZV/46LZV/56LZV/66LZV
Power Supply (V
CC
) Range
0˚C to +70˚C
−40˚C to +85˚C
−40˚C to +125˚C
4.5V to 5.5V
DC and AC Electrical Characteristics:
4.5V
≤
V
CC
≤
5.5V
Symbol
I
CC1
I
CC2
I
CC3
I
IL
I
OL
V
IL
V
IH
V
OL1
V
OH1
V
OL2
V
OH2
f
SK
t
SKH
t
SKL
t
CS
t
CSS
t
DH
Parameter
Operating Current
CMOS Input Levels
Operating Current
TTL Input Levels
Standby Current
Input Leakage
Output Leakage
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
SK Clock Frequency
SK High Time
SK Low Time
Minimum CS Low Time
CS Setup Time
DO Hold Time
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
Relative to SK
Relative to SK
(Note 2)
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
I
OH
= −10 µA
0.9 V
CC
0
0
250
300
250
250
250
250
50
50
70
ns
ns
ns
ns
1
1
ns
V
MHz
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
I
OL
= 2.1 mA
I
OH
= 2.1 mA
I
OL
I
OL
= −400 µA
= 10 µA
2.4
0.2
Part Number
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
V
IN
= 0V to V
CC
V
IN
= 0V to V
CC
−2.5
−10
−2.5
−10
−0.1
2
CS = 0V
Conditions
CS = V
IH
, SK = 1 MHz
SK = 1 MHz
CS = V
IH
, SK = 1 MHz
Min
Max
2
2
3
3
50
50
2.5
10
2.5
10
0.8
V
CC
+ 1
0.4
0.4
V
V
V
V
V
nA
nA
µA
mA
Units
mA
DC and AC Electrical Characteristics:
V
CC
= 5.0V
±
10% unless otherwise specified
Symbol
t
DIS
t
CSH
t
DIH
t
PD1
Parameter
DI Setup Time
CS Hold Time
DI Hold Time
Output Delay to “1”
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
Part Number
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
Relative to SK
Relative to SK
AC Test
Conditions
Relative to SK
Min
100
200
0
20
500
500
ns
ns
ns
Max
Units
ns
www.fairchildsemi.com
4
PrintDate=1997/08/15 PrintTime=11:24:13 7630 ds011778 Rev. No. 3 cmserv
Proof
4
DC and AC Electrical Characteristics:
V
CC
= 5.0V
±
10% unless otherwise specified
Symbol
t
PD0
t
SV
t
DF
t
WP
Parameter
Output Delay to “0”
CS to Status Valid
CS to DO in TRI-STATE
Write Cycle Time
Part Number
NM93C06/46/56/66LZ
(Continued)
Conditions
AC Test
AC Test
AC Test
CS = V
IL
Min
Max
500
500
500
500
100
100
10
Units
ns
ns
ns
ms
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
NM93C06/46/56/66LZ
NM93C06/46/56/66LZE/V
AC Test Conditions
Output Load: 1 TTL Gate and C
L
= 100 pF
V
CC
Range
4.5V
<
V
CC
<
5.5V
Input Pulse Levels
Timing Measurement Level (V
IL
/V
IH
)
Timing Measurement Level (V
OL
/V
OH
)
(TTL Load Condition:
I
OL
= 2.1 mA, I
OH
= −0.4 mA)
2.7V
<
V
CC
<
4.5V
Input Pulse Levels
Timing Measurement Level (V
IL
/V
IH
)
Timing Measurement Level (V
OL
/V
OH
)
(CMOS Load Condition:
I
OL
= 10 µA, I
OH
= −10 µA)
0.3V and 0.8 V
CC
0.4V and 1.6V
0.8V and 1.6V
AC Test Conditions
0.8V and 2.0V
0.9V and 1.9V
0.8V and 2.0V
Capacitance
T
A
= 25˚C, f = 1 MHz
Symbol
C
OUT
C
IN
Test
Output Capacitance
Input Capacitance
Max
5
5
Units
pF
pF
Note 1:
Stress above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional op-
eration of the device at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods may affect device reliability.
Note 2:
CS must be brought low for a minimum of 1 t
CS
between consecutive instruction cycles.
Functional Description
The NM93C06/C46/C56/C66LZ devices have 7 instructions
as described below. Note that the MSB of any instruction is
a “1” and is viewed as a start bit in the interface sequence.
For the C06LZ and C46LZ the next 8 bits carry the op code
and the 6-bit address for register selection. For the C56LZ
and C66LZ the next 10 bits carry the op code and the 8-bit
address for register selection.
Read (READ):
The READ instruction outputs serial data on
the DO pin. After the READ instruction is received, the in-
struction and address are decoded, followed by data transfer
from the selected memory register into a serial-out shift reg-
ister. A dummy bit (logical 0) precedes the 16-bit data output
string. Output data changes are initiated by a low to high
transition of the SK clock.
Erase/Write Enable (EWEN):
When V
CC
is applied to the
part, it powers up in the Erase/Write Disable (EWDS) state.
Therefore, all programming modes must be preceded by an
Erase/Write Enable (EWEN) instruction. Once an Erase/
5
Write Enable instruction is executed, programming remains
enabled until an Erase/Write Disable (EWDS) instruction is
executed or until V
CC
is removed from the part.
Erase (ERASE):
The ERASE instruction will program all bits
in the specified register to the logical “1” state. CS is brought
low following the loading of the last address bit. This falling
edge of the CS pin initiates the self-timed programming
cycle.
The DO pin indicates the READY/BUSY status of the chip.
DO = logical “0” indicates that programming is still in
progress. DO = logical “1” indicates that the register, at the
address specified in the instruction, has been erased, and
the part is ready for another instruction.
Write (WRITE):
The WRITE instruction is followed by 16 bits
of data to be written into the specified address. After the last
bit of data is put on the data-in (DI) pin, CS must be brought
low before the next rising edge of the SK clock. This falling
www.fairchildsemi.com
PrintDate=1997/08/15 PrintTime=11:24:14 7630 ds011778 Rev. No. 3 cmserv
Proof
5
京公网安备 11010802033920号
EEWORLD
