APL5525/5526
Dual Channel 500mA Regulator + Reset IC
Features
•
•
Low Quiescent Current : 130µA (No load)
Low Dropout Voltage :
V
DROP1
=550mV@500mA
V
DROP2
=630mV@500mA
Fixed Output Voltage :
V
OUT1
=3.3V/500mA
V
OUT2
=2.5V/500mA
Stable with 4.7µF Output Capacitor
Stable with Aluminum, Tantalum or Ceramic
Capacitors
Reverse Current Protection
No Protection Diodes Needed
Built in Thermal Protection
Fast Transient Response
Short Setting Time
SOP-8, SOP-8-P with Thermal Pad Packages
Adjustment-free Reset Detection Voltage :
3.9V or 4.2V typ
Easy to Set Delay Time from Voltage
Detection to Reset Release
General Description
The APL5525/6 is a dual-channel regulator with reset
function (specific voltage monitoring), and internal
delay circuit, set to detect 3.9V or 4.2V. Maximum
input voltage is 6V, output1 and output2 deliver up to
500mA. V
OUT1
typical dropout voltage is 550mV at
500mA loading and V
OUT2
typical dropout voltage is
630mV at 500mA loading. Design with an internal P-
channel MOSFET pass transistor, the APL5525/6
maintains a low supply current. Other features include,
thermal-shutdown protection, current limit protection
to ensure specified output current. The APL5525/6
come in miniature SOP-8 and SOP-8-P packages.
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•
•
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Pin Configuration
SOP-8 Top View
C d
R E S E T
V
D E T
1
2
3
4
8
7
6
5
C O N T
G N D
V
V
O U T 2
O U T 1
C d
R E S E T
V
D E T
1
2
3
4
8
7
6
5
C O N T
G N D
V
V
O U T 2
O U T 1
V
IN
V
IN
Applications
C d
1
2
3
4
8
7
6
5
SOP-8-P Top View
C O N T
G N D
V
V
O U T 2
O U T 1
C d
R E S E T
V
D E T
1
2
3
4
8
7
6
5
C O N T
G N D
V
V
O U T 2
O U T 1
•
CD-ROM drive.
R E S E T
V
D E T
V
IN
V
IN
APL5525
APL5526
= Thermal Pad
(connected to GND plane for better heat
dissipation)
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and advise
customers to obtain the latest version of relevant information to verify before placing orders.
Copyright
ANPEC Electronics Corp.
Rev. A.3 - Jul., 2003
1
www.anpec.com.tw
APL5525/5526
Ordering and Marking Information
APL5525/6 -
Lead Free Code
Handling Code
Tem p. Range
Package Code
Detection Voltage
Package Code
K : SO P-8
KA : SO P-8-P
Tem p. Range
C : 0 to 70 C
°
Handling Code
TR : Tape & Reel
Detection Voltage :
A : 3.9V
B : 4.2V
Lead Free Code
L : Lead Free Device
Blank : O rginal Device
X
- Detection Voltage
XXXXX - Date Code
APL5525/6 K / KA :
APL5525/6X
XXXXX
Pin Description
No.
1
2
3
4
5
6
7
8
PIN
Name
Cd
RESET
RESET
V
DET
V
IN
V
OUT1
V
OUT2
GND
CONT
O
O
I
I
O
O
I
I/O
Description
Delay time capacitor pin, RESET pin output delay time can be set by
the capacitor connected to the Cd pin. tPLH = 130000∗C, tPLH :
transmission delay time (s), C:capacitor value (F)
Input voltage detection output pin , low = V
DET
<VS , high = V
DET
>VS
Input voltage detection output pin , high = V
DET
<VS , low = V
DET
>VS
Input pin of voltage detection.
Voltage supply input pin.
Regulator output pin.
Regulator output pin.
GND pin
V
OUT1
on/off-control pin, V
OUT1
will be turn off when CONT pull to low.
Absolute Maximum Ratings
S ym b o l
V
IN
, V
O U T
CONT
V
DET
R
T H ,JA
P aram eter
Input Voltage or O ut Voltage
V
O U T 1
S hutdow n C ontrol P in
R E S E T P in S upply Voltage
T herm al R esistance – Junction to A m bient
S O P -8
S O P -8-P
P ow er D issipation
O perating Junction Tem perature
C ontrol S ection
P ow er Transistor
T
STG
T
L
S torage Tem perature R ange
Lead Tem perature (S oldering, 10 second)
2
R atin g
6
6
6
160
80
Internally Lim ited
0 to 125
0 to 150
-65 to +150
260
U n it
V
V
V
°C
/W
W
°C
°C
°C
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P
D
T
J
Copyright
ANPEC Electronics Corp.
Rev. A.3 - Ju1., 2003
APL5525/5526
Electrical Characteristics (Cont.)
Unless otherwise noted these specifications apply over full temperature , V
IN
=5V, C
IN
=1µF,C
OUT1
=4.7µF,
C
OUT2
=4.7µF, CONT=V
IN
, T
J
=0 to 125°C . Typical values refer to T
J
=25°C .
Symbol
Parameter
Test Conditions
V
OUT
+0.5V< V
IN
<6.0V, I
OUT
=10mA
V
IN
=5V, 0mA< I
OUT
< I
MAX
APL5525/6
Min.
Typ.
4
30
630
45
52
125
10
100
0.01
V
DET
=H!L (APL5525/6A)
V
DET
=H!L (APL5525/6B)
T
a
= -20~+80°C
V
DET
= H!L
V
DET
= 3.9V, R
L
= 4.7kΩ
V
DET
= 5V
V
DET
=3.9V, V
RESET
= 0.4V
V
DET
= 3.9V, V
RESET
= 0.4V
T
a
= -20~+80°C
130
3.9
4.2
100
180
12
0.5
30
25
42
8
13
4
0.95
90
18
90
1.25
230
60
1
4.7
1
Max.
6
50
750
Unit
mV
mV
mV
dB
°C
°C
ppm/°C
µF
Ohm
REG
LINE
Line Regulation
REG
LOAD
Load Regulation
(Note)
Dropout Voltage
V
DROP
(VOUT(Nominal)=2.5V I
OUT
=500mA
Version)
F
≤
1kHz, 1Vpp at I
OUT
=50mA
PSRR Ripple Rejection
Over Temperature
Shutdown
OTS
Over Temperature
Hysteresis
Shutdown Hysteresis
TC
C
OUT
Output Voltage
Temperature
Coefficient
Output Capacitor
ESR
T
a
= -20 ~ 80°c
RESET / RESET
VS
Detection Voltage
V
ppm/°C
mV
mV
µA
mA
mA
µs
ms
µs
V
Vs Temperature
µVS/µT
Coefficient
µVS
V
OL
I
OH
I
OL1
I
OL2
t
PLH
t
PLH1
t
PHL
V
OPL
Hysteresis Voltage
Low-level Output
Voltage
Output Leakage
Current
Output Current1
Output Current2
25
20
“H” Transmission Delay Cd = 0µF
Time
Reset Delay Time
V
DET
=
3.7V!5V, Cd = 0.1µF
“L” Transmission Delay
Cd = 0µF
Time
Threshold Operating
Voltage
V
RESET
= 0.4V
Note : Dropout voltage definition : V
IN
- V
OUT
when V
OUT
is 2% below the value of V
OUT
for V
IN
=5V
Copyright
ANPEC Electronics Corp.
Rev. A.3 - Ju1., 2003
4
www.anpec.com.tw
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