W9425G8EH datasheet, PDF - EEWORLD Datasheet

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W9425G8EH: Description8M Ã 4 BANKS Ã 8 BITS DDR SDRAM; File Size2MB，53 Pages; ManufacturerWinbond Electronics Corporation; Websitehttp://www.winbond.com.tw

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W9425G8EH Overview

8M Ã 4 BANKS Ã 8 BITS DDR SDRAM

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W9425G8EH

4 BANKS

8 BITS DDR SDRAM

Table of Contents-

GENERAL DESCRIPTION .............................................................................................................. 4

FEATURES...................................................................................................................................... 4

KEY PARAMETERS........................................................................................................................ 5

PIN CONFIGURATION.................................................................................................................... 6

PIN DESCRIPTION ......................................................................................................................... 7

BLOCK DIAGRAM........................................................................................................................... 8

FUNCTIONAL DESCRIPTION ........................................................................................................ 9

7.1

7.2

Power Up Sequence.............................................................................................................. 9

Command Function ............................................................................................................. 10

7.2.1

7.2.2

7.2.3

7.2.4

7.2.5

7.2.6

7.2.7

7.2.8

7.2.9

7.2.10

7.2.11

7.2.12

7.2.13

7.2.14

7.2.15

7.2.16

Bank Activate Command ......................................................................................................10

Bank Precharge Command ..................................................................................................10

Precharge All Command ......................................................................................................10

Write Command ...................................................................................................................10

Write with Auto-precharge Command ..................................................................................10

Read Command ...................................................................................................................10

Read with Auto-precharge Command ..................................................................................10

Mode Register Set Command ..............................................................................................11

Extended Mode Register Set Command ..............................................................................11

No-Operation Command ......................................................................................................11

Burst Read Stop Command..................................................................................................11

Device Deselect Command ..................................................................................................11

Auto Refresh Command .......................................................................................................11

Self Refresh Entry Command...............................................................................................12

Self Refresh Exit Command .................................................................................................12

Data Write Enable /Disable Command .................................................................................12

7.3

7.4

7.5

7.6

7.7

7.8

7.9

Read Operation ................................................................................................................... 12

Write Operation ................................................................................................................... 13

Precharge ............................................................................................................................ 13

Burst Termination ................................................................................................................ 13

Refresh Operation ............................................................................................................... 13

Power Down Mode .............................................................................................................. 14

Input Clock Frequency Change during Precharge Power Down Mode .............................. 14

7.10.1

Burst Length field (A2 to A0) ................................................................................................14

7.10 Mode Register Operation .................................................................................................... 14

-1-

Publication Release Date: Jul. 04

2008

Revision A01

W9425G8EH

7.10.2

7.10.3

7.10.4

7.10.5

7.10.6

7.10.7

Addressing Mode Select (A3)...............................................................................................15

CAS Latency field (A6 to A4)................................................................................................16

DLL Reset bit (A8) ................................................................................................................16

Mode Register /Extended Mode register change bits (BS0, BS1) ........................................16

Extended Mode Register field ..............................................................................................16

Reserved field ......................................................................................................................16

OPERATION MODE...................................................................................................................... 17

8.1

8.2

8.3

8.4

Simplified Truth Table.......................................................................................................... 17

Function Truth Table ........................................................................................................... 18

Function Truth Table for CKE.............................................................................................. 21

Simplified Stated Diagram................................................................................................... 22

Absolute Maximum Ratings................................................................................................. 23

Recommended DC Operating Conditions ........................................................................... 23

Capacitance......................................................................................................................... 24

Leakage and Output Buffer Characteristics ........................................................................ 24

DC Characteristics............................................................................................................... 25

AC Characteristics and Operating Condition....................................................................... 26

AC Test Conditions.............................................................................................................. 27

ELECTRICAL CHARACTERISTICS ............................................................................................. 23

9.1

9.2

9.3

9.4

9.5

9.6

9.7

10. SYSTEM CHARACTERISTICS FOR DDR SDRAM ..................................................................... 30

10.1 Table 1: Input Slew Rate for DQ, DQS, and DM................................................................. 30

10.2 Table 2: Input Setup & Hold Time Derating for Slew Rate.................................................. 30

10.3 Table 3: Input/Output Setup & Hold Time Derating for Slew Rate...................................... 30

10.4 Table 4: Input/Output Setup & Hold Derating for Rise/Fall Delta Slew Rate ...................... 30

10.5 Table 5: Output Slew Rate Characteristics (X8 Devices only) ............................................ 30

10.6 Table 6: Output Slew Rate Matching Ratio Characteristics ................................................ 31

10.7 Table 7: AC Overshoot/Undershoot Specification for Address and Control Pins ............... 31

10.8 Table 8: Overshoot/Undershoot Specification for Data, Strobe, and Mask Pins ................ 32

10.9 System Notes: ..................................................................................................................... 33

11. TIMING WAVEFORMS.................................................................................................................. 35

11.1 Command Input Timing ....................................................................................................... 35

11.2 Timing of the CLK Signals................................................................................................... 35

11.3 Read Timing (Burst Length = 4) .......................................................................................... 36

11.4 Write Timing (Burst Length = 4) .......................................................................................... 37

11.5 DM, DATA MASK (W9425G8EH) ....................................................................................... 38

11.6 Mode Register Set (MRS) Timing ....................................................................................... 39

11.7 Extend Mode Register Set (EMRS) Timing......................................................................... 40

Publication Release Date: Jul. 04

2008

Revision A01

-2-

W9425G8EH

11.8 Auto-precharge Timing (Read Cycle, CL = 2) ..................................................................... 41

11.9 Auto-precharge Timing (Read cycle, CL = 2), continued .................................................... 42

11.10 Auto-precharge Timing (Write Cycle) .................................................................................. 43

11.11 Read Interrupted by Read (CL = 2, BL = 2, 4, 8) ................................................................ 44

11.12 Burst Read Stop (BL = 8) .................................................................................................... 44

11.13 Read Interrupted by Write & BST (BL = 8).......................................................................... 45

11.14 Read Interrupted by Precharge (BL = 8) ............................................................................. 45

11.15 Write Interrupted by Write (BL = 2, 4, 8) ............................................................................. 46

11.16 Write Interrupted by Read (CL = 2, BL = 8)......................................................................... 46

11.17 Write Interrupted by Read (CL = 3, BL = 4)......................................................................... 47

11.18 Write Interrupted by Precharge (BL = 8) ............................................................................. 47

11.19 2 Bank Interleave Read Operation (CL = 2, BL = 2) ........................................................... 48

11.20 2 Bank Interleave Read Operation (CL = 2, BL = 4) ........................................................... 48

11.21 4 Bank Interleave Read Operation (CL = 2, BL = 2) ........................................................... 49

11.22 4 Bank Interleave Read Operation (CL = 2, BL = 4) ........................................................... 49

11.23 Auto Refresh Cycle.............................................................................................................. 50

11.24 Precharge/Activate Power Down Mode Entry and Exit Timing ........................................... 50

11.25 Input Clock Frequency Change during Precharge Power Down Mode Timing................... 50

11.26 Self Refresh Entry and Exit Timing ..................................................................................... 51

12. PACKAGE SPECIFICATION......................................................................................................... 52

12.1 TSOP 66 lI – 400 mil ........................................................................................................... 52

13. REVISION HISTORY..................................................................................................................... 53

-3-

Publication Release Date: Jul. 04

2008

Revision A01

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