BU-62843G3-480Y datasheet, PDF

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> BU-62843G3-480Y

BU-62843G3-480Y: DescriptionMil-Std-1553 Controller, 2 Channel(s), 0.125MBps, CMOS, CQFP72, 1 INCH, CERAMIC, QFP-72; CategoryThe embedded processor and controller Microcontrollers and processors; File Size1MB，57 Pages; ManufacturerData Device Corporation

Download Datasheet Parametric View All

BU-62843G3-480Y Overview

Mil-Std-1553 Controller, 2 Channel(s), 0.125MBps, CMOS, CQFP72, 1 INCH, CERAMIC, QFP-72

BU-62843G3-480Y Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Data Device Corporation
Parts packaging code	QFP
package instruction	1 INCH, CERAMIC, QFP-72
Contacts	72
Reach Compliance Code	compliant
Address bus width	32
boundary scan	NO
Bus compatibility	PCI
maximum clock frequency	20 MHz
letter of agreement	MIL-STD-1553A; MIL-STD-1553B; STANAG-3838
Data encoding/decoding methods	BIPH-LEVEL(MANCHESTER)
Maximum data transfer rate	0.125 MBps
External data bus width	32
JESD-30 code	S-CQFP-G72
JESD-609 code	e0
length	25.4 mm
low power mode	NO
Number of serial I/Os	2
Number of terminals	72
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	QFP
Package shape	SQUARE
Package form	FLATPACK
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Filter level	MIL-STD-883
Maximum seat height	4.346 mm
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	MILITARY
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	25.4 mm
uPs/uCs/peripheral integrated circuit type	SERIAL IO/COMMUNICATION CONTROLLER, MIL-STD-1553

Preview

Download Datasheet

View All

BU-62743/62843/62864

PCI ENHANCED MINIATURE

ADVANCED COMMUNICATION

ENGINE (PCI ENHANCED MINI-ACE®)

Make sure the next

Card you purchase

has...

FEATURES

•

32-Bit/33MHz, 3.3Volt, PCI Target

Interface

•

Fully Integrated 1553A/B Notice 2,

McAir, STANAG 3838 Interface

Terminal

•

Compatible with Enhanced Mini-ACE,

Mini-ACE (Plus) and ACE Generations

•

Choice of:

• RT only with 4K RAM (BU-62743)

• BC/RT/MT with 4K RAM (BU-62843)

• BC/RT/MT with 64K RAM, with RAM

Parity (BU-62864)

•

3.3V Logic

•

5V Transceiver. Available with 1760 or

McAir Compatible Options

•

1.0-inch square, 72-Pin Flatpack /

Formed Gull Lead Ceramic Package

•

Choice of 10, 12, 16, or 20MHz 1553

Clock

•

Highly Autonomous BC with Built-in

Message Sequence Control:

• Frame Scheduling

• Branching

• Asynchronous Message Insertion

• General Purpose Queue

• User-defined Interrupts

•

Advanced RT Functions:

• Global Circular Buffering

• Interrupt Status Queue

• 50% Circular Buffer Rollover

Interrupts

•

Selective Message Monitor or RT/

Monitor

Actual Size:

1.0” Square Package

DESCRIPTION

The PCI Enhanced Mini-ACE family of MIL-STD-1553 terminals pro-

vides a complete interface between a 32-Bit / 33MHz PCI Bus and a

MIL-STD-1553 bus. These terminals integrate dual transceiver, proto-

col logic, and 4K words or 64K words of RAM.

With a 1.0-inch square package, the PCI Enhanced Mini-ACE is

nearly 100% footprint and software compatible with the Enhanced

Mini-ACE, previous generation Mini-ACE (Plus) terminals, and is soft-

ware compatible with the older ACE series.

The PCI portion of the PCI Enhanced Mini-ACE is powered by 3.3V.

The PCI interface is NOT 5V tolerant.

Multiprotocol support of MIL-STD-1553A/B and STANAG 3838, includ-

ing versions incorporating McAir compatible transmitters, is provided.

There is a choice of 10, 12, 16, or 20 MHz 1553 clocks. The BC/RT/

MT versions with 64K words of RAM include built-in RAM parity check-

ing.

BC features include a built-in message sequence control engine, with

a set of 20 instructions. This provides an autonomous means of

implementing multi-frame message scheduling, message retry

schemes, data double buffering, asynchronous message insertion,

and reporting to the host CPU.

The PCI Enhanced Mini-ACE RT offers the choices of single and

circular buffering, along with a global circular buffering option, 50%

rollover interrupt for circular buffers, and an interrupt status queue.

FOR MORE INFORMATION CONTACT:

Data Device Corporation

105 Wilbur Place

Bohemia, New York 11716

631-567-5600 Fax: 631-567-7358

www.ddc-web.com

Technical Support:

1-800-DDC-5757 ext. 7771

2002 Data Device Corporation

Recommended Resources

Op amp impedance multiplication circuit

M50194AP application circuit

TDA1020 power amplifier circuit diagram

Frequency doubling circuit composed of diodes

Single touch switch signal input circuit

Contactor interlocking forward and reverse control circuit diagram

How to define an array in Flash for MSP430G2452: I am using 2452 to make a 12864 OLED display program, but because the custom font library is too large, the RAM is full. I would like to ask how to define the Const array into the Flash?...; gameboy22 Microcontroller MCU

【Activity Post】Let’s learn about device indicators together, Part 3, content discussion: 【Activity Post】Let’s learn about device indicators together, Part 3, content discussionFirst, let me briefly describe the activities: 1. Every week we release a device type and publish some of the dev...; wstt Microcontroller MCU

4 important points to note when designing the PCB for smart wearable bracelets: PCB design runs through our entire life. As a popular product form in the past two years, smart bracelets have attracted more and more attention from people. At the same time, they have also brought s...; 高速PCB设计 Integrated technical exchanges

I can't help but show off the little fan I got from the forum.: [font=宋体][size=4]I participated in a forum activity before, and it seems that I got it by downloading the information and drawing a lottery. [/size][/font] [font=宋体][size=4] It's a fan again. I won a ...; lingergz Talking

[Mobile Phone Tools] A must-read for FPGA experts, how to use the advanced design functions of Xilinx's ISE software, highly recommended!!!: A must-read for FPGA experts, the use of Xilinx's ISE software advanced design functions, excerpted from classic chapters of classic books, completely in accordance with the way of thinking of Chinese...; GONGHCU FPGA/CPLD

SensorTagCreative: Due to time constraints, SensorTag is used as the hardware and the above resources are used for design. Approximate solution: BLE Device + APP Specific: Based on sensorTag and iBeacon technology, phys...; chuck_pz Wireless Connectivity

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components