monolithic wideband/video switches designed for switching
RF, video and digital signals. By utilizing a "T" switch
configuration on each channel, these devices achieve
exceptionally low crosstalk and high off-isolation. The
crosstalk and off-isolation of the DG540 are further improved
by the introduction of extra GND pins between signal pins.
To achieve TTL compatibility, low channel capacitances and
fast switching times, the DG540 family is built on the Vishay
Siliconix proprietary D/CMOS process. Each switch
conducts equally well in both directions when on.
FEATURES
•
Halogen-free according to IEC 61249-2-21
Definition
• Wide Bandwidth: 500 MHZ
• Low Crosstalk: - 85 dB
• High Off-Isolation: - 80 dB at 5 MHz
• "T" Switch Configuration
• TTL and CMOS Logic Compatible
• Fast Switching - t
ON
: 45 ns
• Low R
DS(on)
: 30
• Compliant to RoHS Directive 2002/95/EC
BENEFITS
•
•
•
•
•
•
•
•
•
•
•
•
•
•
•
Flat Frequency Response
High Color Fidelity
Low Insertion Loss
Improved System Performance
Reduced Board Space
Reduced Power Consumption
Improved Data Throughput
RF and Video Switching
RGB Switching
Local and Wide Area Networks
Video Routing
Fast Data Acquisition
ATE
Radar/FLR Systems
Video Multiplexing
DG540
PLCC
IN 1
IN 2
APPLICATIONS
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG540
Dual-In-Line
IN
1
D
1
GND
S
1
V-
GND
S
4
GND
D
4
IN
4
1
2
3
4
5
6
7
8
9
10
Top View
20
19
18
17
16
15
14
13
12
11
IN
2
D
2
GND
S
2
V+
GND
S
3
GND
9
D4
D
3
IN
3
10 11 12 13
IN3
IN4
D3
GND
S
1
V-
GND
S
4
GND
4
5
6
7
8
18
17
16
15
14
GND
S
2
V+
GND
S
3
GND
3
2
D1
1
20 19
Top View
TRUTH TABLE
Logic
0
1
Logic “0”
0.8
V
Logic “1”
2
V
Document Number: 70055
S11-1429–Rev. H, 18-Jul-11
www.vishay.com
1
Switch
OFF
ON
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
D2
DG540, DG541, DG542
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG541
Dual-In-Line and SOIC
IN
1
D
1
S
1
V-
GND
S
4
D
4
IN
4
IN
2
D
2
S
2
V+
GND
S
3
D
3
IN
3
IN
1
D
1
GND
S
1
V-
S
4
GND
D
4
1
2
3
4
5
6
7
8
DG542
Dual-In-Line and SOIC
16
15
14
13
12
11
10
9
Top View
IN
2
D
2
GND
S
2
V+
S
3
GND
D
3
1
2
3
4
5
6
7
8
Top View
16
15
14
13
12
11
10
9
TRUTH TABLE - DG541
Logic
0
1
Logic "0"
0.8
V
Logic "1"
2
V
Switch
OFF
ON
TRUTH TABLE - DG542
Logic
0
1
Logic "0"
0.8
V
Logic "1"
2
V
SW
1
, SW
2
OFF
ON
SW
3
, SW
4
ON
OFF
ORDERING INFORMATION
Temp Range
DG540
- 40 to 85 °C
- 55 to 125 °C
DG541
- 40 to 85 °C
- 55 to 125 °C
DG542
- 40 to 85 °C
- 55 to 125 °C
16-Pin Plastic DIP
16-Pin Narrow SOIC
16-Pin Sidebraze
DG542DJ-E3
DG542DY-T1-E3
DG542AP
DG542AP/883, 5962-91555201MEA
16-Pin Plastic DIP
16-Pin Narrow SOIC
16-Pin Sidebraze
DG541DJ-E3
DG541DY-T1-E3
DG541AP
DG541AP/883, 5962-9076401MEA
Package
20-Pin Plastic DIP
20-Pin PLCC
20-Pin Sidebraze
DG540DJ-E3
DG540DN-E3
DG540AP
DG540AP/883
Part Number
www.vishay.com
2
Document Number: 70055
S11-1429–Rev. H, 18-Jul-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
DG540, DG541, DG542
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25 °C, unless otherwise noted)
Parameter
V+ to V-
V+ to GND
V- to GND
Digital Inputs
V
S
, V
D
Continuous Current (Any Terminal)
Current, S or D (Pulsed at 1 ms, 10 % duty cycle max)
(AP Suffix)
Storage Temperature
(DJ, DN, DY Suffixes)
16-Pin Plastic DIP
b
20-Pin Plastic DIP
c
Power Dissipation
(Package)
a
16-Pin Narrow Body
20-Pin PLCC
Notes:
a. All leads welded or soldered to PC Board.
b. Derate 6.5 mW/°C above 25 °C.
c. Derate 7 mW/°C above 25 °C.
d. Derate 10 mW/°C above 75 °C.
e. Derate 12 mW/°C above 75 °C.
d
Symbol
Limit
- 0.3 to 21
- 0.3 to 21
- 19 to + 0.3
(V-) - 0.3 to (V+) + 0.3
or 20 mA, whichever occurs first
(V-) - 0.3 to (V+) + 14
or 20 mA, whichever occurs first
20
40
- 65 to 150
- 65 to 125
470
800
Unit
V
mA
°C
SOIC
d
640
800
900
mW
16-, 20-Pin Sidebraze DIP
e
SCHEMATIC DIAGRAM
(typical channel)
V+
GND
V
REF
S
IN
-
+
D
V-
Figure 1.
Document Number: 70055
S11-1429–Rev. H, 18-Jul-11
www.vishay.com
3
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
DG540, DG541, DG542
Vishay Siliconix
SPECIFICATIONS
a
Test Conditions
Unless Specified
V+ = 15 V, V- = - 3 V
Parameter
Analog Switch
Analog Signal Range
Drain-Source
On-Resistance
R
DS(on)
Match
Source Off Leakage Current
Drain Off Leakage Current
Channel On Leakage Current
Digital Control
Input Voltage High
Input Voltage Low
Input Current
Dynamic Characteristics
On State Input Capacitance
e
Off State Input Capacitance
e
Off State Output Capacitance
e
Bandwidth
Turn-On Time
C
S(on)
C
S(off)
C
D(off)
BW
t
ON
V
S
= V
D
= 0 V
V
S
= 0 V
V
D
= 0 V
R
L
= 50
,
See Figure 5
DG540
DG541
R
L
= 1 k
C
L
= 35 pF
50 % to 90 %
See Figure 2
DG542
DG540
DG541
DG542
Charge Injection
Q
C
L
= 1000 pF, V
S
= 0 V
See Figure 3
R
IN
= 75
R
L
= 75
DG540
DG541
f = 5 MHz
See Figure 4
DG542
R
IN
= 10
,
R
L
= 75
f = 5 MHz, See Figure 6
Room
Room
Room
Room
Room
Full
Room
Full
Room
Full
Room
Full
Room
Room
Room
Room
Room
14
2
2
500
45
55
20
25
- 25
- 80
- 60
- 75
- 85
dB
70
130
100
160
50
85
60
85
70
130
100
160
50
85
60
85
20
4
4
20
4
4
MHz
pF
V
INH
V
INL
I
IN
V
IN
= GND or V+
Full
Full
Room
Full
0.05
2
-1
- 20
0.8
1
20
2
-1
- 20
0.8
1
20
V
µA
Symbol
V
ANALOG
R
DS(on)
R
DS(on)
I
S(off)
I
D(off)
I
D(on)
V
INH
= 2 V, V
INL
= 0.8 V
f
V- = - 5 V, V+ = 12
I
S
= - 10 mA, V
D
= 0 V
V
S
= 0 V, V
D
= 10 V
V
S
= 10 V, V
D
= 0 V
V
S
= V
D
= 0 V
Temp.
b
Full
Room
Full
Room
Room
Full
Room
Full
Room
Full
Typ.
c
A Suffix
D Suffixes
- 55 °C to 125 °C - 40 °C to 85 °C
Min.
d
-5
30
2
- 0.05
- 0.05
- 0.05
- 10
- 500
- 10
- 500
- 10
- 1000
Max.
d
5
60
100
6
10
500
10
500
10
1000
Min.
d
-5
Max.
d
5
60
75
6
10
100
10
100
10
100
Unit
V
- 10
- 100
- 10
- 100
- 10
- 100
nA
ns
Turn-Off Time
t
OFF
pC
Off Isolation
OIRR
All Hostile Crosstalk
Power Supplies
Positive Supply Current
Negative Supply Current
X
TALK(AH)
I+
All Channels On or Off
I-
Room
Full
Room
Full
3.5
- 3.2
-6
-9
6
9
-6
-9
6
9
mA
Notes:
a. Refer to PROCESS OPTION FLOWCHART .
b. Room = 25 °C, full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. V
IN
= input voltage to perform proper function.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
www.vishay.com
4
Document Number: 70055
S11-1429–Rev. H, 18-Jul-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
DG540, DG541, DG542
Vishay Siliconix
TYPICAL CHARACTERISTICS
(T
A
= 25 °C, unless otherwise noted)
6
5
4
I+
I S(off), I D(off)– Leakage
3
2
I (mA)
1
0
-1
-2
I-
-3
-4
-5
- 55
0.1 pA
1 nA
10 nA
100 nA
I
GND
100 pA
10 pA
1 pA
- 35
- 15
5
25
45
65
Temperature (°C)
85
105
125
- 55
- 25
0
25
50
75
Temperature (°C)
100
125
Supply Curent vs. Temperature
160
r
DS(on)
– Drain-Source On-Resistance (Ω)
140
120
100
80
60
40
20
0
-3
-1
1
3
5
7
9
11
V
D
–
Drain
Voltage
(V)
- 55 °C
R
DS(on)
– Drain-Source On-Resistance (Ω)
V+ = 15 V
V- = - 3 V
125 °C
42
I
D(off)
, I
S(off)
vs. Temperature
42
V+ = 10 V
40
38
36
34
32
V+ = 15 V
30
20
18
-5 -4 -3
-2 -1
0
V- – Negative Supply (V)
30
20
18
10 11 12 13 14 15 16
V+ – Positive Supply (V)
V- = - 1 V
V+ = 12 V
40
38
V- = - 5 V
36
34
V- = - 3 V
32
25 °C
R
DS(on)
vs. Drain Voltage
22
20
18
16
ISO (dB)
C (pF)
- 110
- 100
- 90
- 80
- 70
- 60
- 50
- 40
V+ Constant
V- Constant
R
L
= 75
Ω
DG540
14
12
10
DG542
DG541
- 30
8
6
0
2
4
6
8
10
12
14
V
D
– Drain Voltage (V)
- 20
- 10
1
10
f – Frequency (MHz)
100
On Capacitance
Off Isolation
Document Number: 70055
S11-1429–Rev. H, 18-Jul-11
www.vishay.com
5
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
[color=rgb(68, 68, 68)][backcolor=transparent][font=Tahoma,]We are looking for experts in electronics. We are currently setting up a research team and dividing the positions in the electronics field a...
Temperatures are rising sharply in Sonoma Valley. But the wine producer at Gecko Estate is closely monitoring its fields through small wireless Zigbee sensors on each vine. These coin-sized machines c...
TIM_Period sets the value of the auto-reload register period that is loaded into the activity at the next update event. Its value must be between 0x0000 and 0xffff. TIM_Prescaler sets the prescaler va...
Practical production of IoT projects: Bluetooth 4.0 BLE development - smart bulbs - universal remote control : https://training.eeworld.com.cn/course/273293...
Program content: Launchpad first sends the string "2JEnter text:" to the PC. After receiving the data, the PC can send any data. After receiving the data, Launchpad can return the same data to the PC....
Dear experts, I looked at a board today and found that as shown in the picture, why is the background yellow? I double-clicked the yellow piece and it showed POLYREGION REGION, which is in the lay_20 ...
Recruitment
京公网安备 11010802033920号
EEWORLD
