Ordering number : ENA0886
LC87F7J32A
Overview
CMOS IC
FROM 32K byte, RAM 1024 byte on-chip
8-bit 1-chip Microcontroller
The SANYO LC87F7J32A is an 8-bit microcomputer that, centered around a CPU running at a minimum bus cycle time
of 83.3ns, integrates on a single chip a number of hardware features such as 32K-byte flash ROM (onboard
programmable), 1024-byte RAM, an on-chip debugger, a LCD controller/driver, sophisticated 16-bit timer/counter (may
be divided into 8-bit timers), a 16-bit timer/counter (may be divided into 8-bit timers/counters or 8-bit PWMs), four 8-bit
timers with a prescaler, a 16-bit timer with a prescaler (may be divided into 8-bit timers), a base timer serving as a time-
of-day clock, a day and time counter, a synchronous SIO interface (with automatic block transmission/reception
capabilities), an asynchronous/synchronous SIO interface, a UART interface (full duplex), two 12-bit PWM channels,
a 12-bit/8-bit 10-channel AD converter, remote control receive function, a high-speed clock counter, a system clock
frequency divider, an internal reset and a 25-source 10-vector interrupt feature.
Features
Flash
ROM
•
Capable of on-board-programming with wide range, 3.0 to 5.5V,of voltage souce
•
Block-erasable in 128-byte units
•
32768
×
8 bits
RAM
•
1024
×
9 bits
Minimum
Bus Cycle Time
•
83.3ns (12MHz)
VDD=3.0 to 5.5V
•
125ns (8MHz)
VDD=2.5 to 5.5V
•
250ns (4MHz)
VDD=2.2 to 5.5V
Note: The bus cycle time here refers to the ROM read speed.
Minimum
Instruction Cycle Time (tCYC)
•
250ns (12MHz)
VDD=3.0 to 5.5V
•
375ns (8MHz)
VDD=2.5 to 5.5V
•
750ns (4MHz)
VDD=2.2 to 5.5V
* This product is licensed from Silicon Storage Technology, Inc. (USA), and manufactured and sold by
SANYO Semiconductor Co., Ltd.
Ver1.00
O1707HKIM 20071009-S00002 No.A0886-1/29
LC87F7J32A
Ports
•
Normal withstand voltage I/O ports
Ports whose I/O direction can be designated in 1 bit units 15 (P1n, P30 to P31, P70 to P73, XT2)
Ports whose I/O direction can be designated in 4 bit units 8 (P0n)
(When N-channel open drain output is selected, data can be input in bit units.)
•
Normal withstand voltage input port
1 (XT1)
•
LCD ports
Segment output
24 (S00 to S23)
Common output
4 (COM0 to COM3)
Bias terminals for LCD driver
3 (V1 to V3)
Other functions
Input/output ports
24 (PAn, PBn, PCn,)
Input ports
7 (PLn)
•
Dedicated oscillator ports
2 (CF1, CF2)
•
Reset pin
1 (RES)
•
Power pins
6 (VSS1 to VSS3, VDD1 to VDD3)
LCD
Controller
1) Seven display modes are available (static, 1/2, 1/3, 1/4 duty
×
1/2, 1/3 bias)
2) Segment output and common output can be switched to general-purpose input/output ports
Timers
•
Timer 0: 16-bit timer/counter with two capture registers.
Mode 0: 8-bit timer with an 8-bit programmable prescaler (with two 8-bit capture registers)
×
2 channels
Mode 1: 8-bit timer with an 8-bit programmable prescaler (with two 8-bit capture registers)
+ 8-bit counter (with two 8-bit capture registers)
Mode 2: 16-bit timer with an 8-bit programmable prescaler (with two 16-bit capture registers)
Mode 3: 16-bit counter (with two 16-bit capture registers)
•
Timer 1: 16-bit timer that supports PWM/toggle outputs
Mode 0: 8-bit timer with an 8-bit prescaler (with toggle outputs)
+ 8-bit timer/counter with an 8-bit prescaler (with toggle outputs)
Mode 1: 8-bit PWM with an 8-bit prescaler
×
2 channels
Mode 2: 16-bit timer/counter with an 8-bit prescaler (with toggle outputs)
(toggle outputs also possible from the lower-order 8 bits)
Mode 3: 16-bit timer with an 8-bit prescaler (with toggle outputs)
(The lower-order 8 bits can be used as PWM.)
•
Timer 4: 8-bit timer with a 6-bit prescaler
•
Timer 5: 8-bit timer with a 6-bit prescaler
•
Timer 6: 8-bit timer with a 6-bit prescaler (with toggle output)
•
Timer 7: 8-bit timer with a 6-bit prescaler (with toggle output)
•
Timer 8: 16-bit timer
Mode 0: 8-bit timer with an 8-bit prescaler
×
2 channels (with toggle output)
Mode 1: 16-bit timer with an 8-bit prescaler (with toggle output)
•
Base timer
1) The clock is selectable from the subclock (32.768kHz crystal oscillation), system clock,
and timer 0 prescaler output.
2) Interrupts programmable in 5 different time schemes
•
Day and time counter
1) Using with a base timer,it can be used as 65000 day + minute + second counter.
High-speed
Clock Counter
1) Can count clocks with a maximum clock rate of 20MHz (at a main clock of 10MHz).
2) Can generate output real-time.
No.A0886-2/29
LC87F7J32A
SIO
•
SIO0: 8-bit synchronous serial interface
1) LSB first/MSB first mode selectable
2) Built-in 8-bit baudrate generator (maximum transfer clock cycle = 4/3 tCYC)
3) Automatic continuous data transmission (1 to 256 bits specifiable in 1-bit units, suspension and resumption of
data transmission possible in 1-byte units)
•
SIO1: 8-bit asynchronous/synchronous serial interface
Mode 0: Synchronous 8-bit serial I/O (2- or 3-wire configuration, 2 to 512 tCYC transfer clocks)
Mode 1: Asynchronous serial I/O (half-duplex, 8-data bits, 1-stop bit, 8 to 2048 tCYC baudrates)
Mode 2: Bus mode 1 (start bit, 8-data bits, 2 to 512 tCYC transfer clocks)
Mode 3: Bus mode 2 (start detect, 8-data bits, stop detect)
UART
•
Full duplex
•
7/8/9 bit data bits selectable
•
1 stop bit (2-bit in continuous data transmission)
•
Built-in baudrate generator
AD
Converter: 12-bits/8-bits
×
12 channels
•
12 bits/8 bits AD converter resolution selectable
PWM:
Multi frequency 12-bit PWM
×
2 channels
Infrared
Remote Control Receiver Circuit
1) Noise reduction function
(noise filter time constant: Approx. 120μs, when the 32.768kHz crystal oscillator is selected as the reference
voltage source.)
2) Supports data encoding systems such as PPM (Pulse Position Modulation) and Manchester encoding
3) X’tal HOLD mode release function
Watchdog
Timer
•
External RC watchdog timer
•
Basetimer watchdog timer
•
Interrupt and reset signals selectable
Clock
Output Function
1) Able to output selected oscillation clock 1/1, 1/2, 1/4, 1/8, 1/16, 1/32, 1/64 as system clock.
2) Able to output oscillation clock of sub clock.
No.A0886-3/29
LC87F7J32A
Interrupts
•
25 sources, 10 vector addresses
1) Provides three levels (low (L), high (H), and highest (X)) of multiplex interrupt control. Any interrupt requests of
the level equal to or lower than the current interrupt are not accepted.
2) When interrupt requests to two or more vector addresses occur at the same time, the interrupt of the highest
level takes precedence over the other interrupts. For interrupts of the same level, the interrupt into the smallest
vector address takes precedence.
No.
1
2
3
4
5
6
7
8
9
10
Vector Address
00003H
0000BH
00013H
0001BH
00023H
0002BH
00033H
0003BH
00043H
0004BH
Level
X or L
X or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
H or L
INT0
INT1
INT2/T0L/INT4/remote control receiver
INT3/INT5/BT0/BT1
T0H
T1L/T1H
SIO0/UART1 receive
SIO1/UART1 transmit
ADC//T6/T7/PWM4/PWM5
Port 0/T4/T5
Interrupt Source
•
Priority levels X
>
H
>
L
•
Of interrupts of the same level, the one with the smallest vector address takes precedence.
•
IFLG (List of interrupt source flag function)
1) Shows a list of interrupt source flags that caused a branching to a particular vector address
(shown in the diagram above).
Subroutine
Stack Levels: 512 levels (The stack is allocated in RAM.)
High-speed
Multiplication/Division Instructions
•
16 bits
×
8 bits
(5 tCYC execution time)
•
24 bits
×
16 bits
(12 tCYC execution time)
•
16 bits
÷
8 bits
(8 tCYC execution time)
•
24 bits
÷
16 bits
(12 tCYC execution time)
Oscillation
Circuits
•
RC oscillation circuit (internal):
For system clock
•
CF oscillation circuit:
For system clock, with internal Rf
•
Crystal oscillation circuit:
For low-speed system clock, with internal Rf
•
Frequency variable RC oscillation circuit (internal): For system clock
1) Adjustable in
±4%
(typ) step from a selected center frequency.
2) Measures oscillation clock using a input signal from XT1 as a reference.
System
Clock Divider Function
•
Can run on low current.
•
The minimum instruction cycle selectable from 300ns, 600ns, 1.2μs, 2.4μs, 4.8μs, 9.6μs, 19.2μs, 38.4μs,
and 76.8μs (at a main clock rate of 10MHz).
Internal
Reset Function
•
Power-On-Reset (POR) function
1) POR resets the system when the power supply voltage is applied.
2) POR release level is selectable from 4 levels (2.07V, 2.37V, 2.87V, 4.35V) by option.
•
Low Voltage Detection reset (LVD) function
1) LVD used with POR resets the system when the supply voltage is applied and when it is lowered.
2) LVD function is selectable from enable/disable and the reset level is selectable from 3 levels (2.31V, 2.81V,
4.28V) by option.
No.A0886-4/29
LC87F7J32A
Standby
Function
•
HALT mode: Halts instruction execution while allowing the peripheral circuits to continue operation.
(Some parts of the serial transfer function stops operation)
1) Oscillation is not halted automatically.
2) Canceled by a system reset or occurrence of an interrupt
•
HOLD mode: Suspends instruction execution and the operation of the peripheral circuits.
1) The CF, RC, X’tal, and frequency variable RC oscillators automatically stop operation.
2) There are three ways of resetting the HOLD mode.
(1) Setting the reset pin to the low level
(2) Setting at least one of the INT0, INT1, INT2, INT4, and INT5, pins to the specified level
(3) Having an interrupt source established at port 0
•
X'tal HOLD mode: Suspends instruction execution and the operation of the peripheral circuits except the base timer
and the remote control circuit.
1) The CF, RC, and frequency variable RC oscillators automatically stop operation
2) The state of crystal oscillation established when the X'tal HOLD mode is entered is retained.
3) There are five ways of resetting the X'tal HOLD mode.
(1) Setting the reset pin to the low level
(2) Setting at least one of the INT0, INT1, INT2, INT4,and INT5 pins to the specified level
(3) Having an interrupt source established at port 0
(4) Having an interrupt source established in the base timer circuit
(5) Having an interrupt source established in the infrared remote control receiver circuit
On-chip
Debugger
•
Supports software debugging with the IC mounted on the target board.
Package
Form
•
QIP64E(14×14):
•
TQFP64J(10×10):
Lead-free type
Lead-free type
Development
Tools
•
On-chip debugger: TCB87-TypeB + LC87F7J32A
Flash
ROM Programming Board
Package
QIP64E(14×14)
TQFP64J(10×10)
Programming boards
W87F50256Q
W87F57256SQ
Flash
ROM Programmer
Maker
Single
Flash Support Group, Inc.
(Formerly Ando Electric Co., Ltd.)
Gang
Model
AF9708/AF9709/
AF9709B
AF9723 (Main body)
AF9833 (Unit)
SANYO
SKK (SANYO FWS)
Supported Version (Note)
After 0x.xx
After 0x.xx
After 0x.xx
After x.xxA
LC87F7J32A
Device
Note: Please check the latest version.
Same
Package and Pin Assignment as Mask ROM Version.
1) LC877J00 series options can be set by using flash ROM data. Thus the board used for mass production can
be used for debugging and evaluation without modifications.
2) If the program for the mask ROM version is used, the usable ROM/RAM capacity is the same as
the mask ROM version.
No.A0886-5/29
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