19-5759; Rev 1; 5/11
1-Wire 4Kb EEPROM
General Description
The DS24B33 is a 4096-bit, 1-Wire
®
EEPROM orga-
nized as 16 memory pages of 256 bits each. Data is
written to a 32-byte scratchpad, verified, and then
copied to the EEPROM memory. The DS24B33 commu-
nicates over a single-conductor 1-Wire bus. The com-
munication follows the standard 1-Wire protocol. Each
device has its own unalterable and unique 64-bit regis-
tration number that is factory programmed into the chip.
The registration number is used to address the device
in a multidrop 1-Wire net environment. The DS24B33 is
software compatible to the DS2433.
Features
♦
4096 Bits of Nonvolatile EEPROM Partitioned Into
Sixteen 256-Bit Pages
♦
Read and Write Access is Highly Backward-
Compatible to the DS2433
♦
256-Bit Scratchpad with Strict Read/Write
Protocols Ensures Integrity of Data Transfer
♦
Unique, Factory-Programmed, 64-Bit Registration
Number Ensures Error-Free Device Selection and
Absolute Part Identity
♦
Switchpoint Hysteresis to Optimize Performance
in the Presence of Noise
♦
Communicates to Host at 15.4kbps or 125kbps
Using 1-Wire Protocol
♦
Low-Cost Through-Hole and SMD Packages
♦
Operating Range: +2.8V to +5.25V, -40°C to +85°C
♦
IEC 1000-4-2 Level 4 ESD Protection (±8kV
Contact, ±15kV Air, Typical) for IO Pin
DS24B33
Applications
Storage of Calibration Constants
Board Identification
Storage of Product Revision Status
Typical Operating Circuit
V
CC
R
PUP
IO
μC
DS24B33
Ordering Information
PART
DS24B33+
DS24B33+T&R
DS24B33S+
GND
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
TO-92
TO-92
8 SO (208 mils)
8 SO (208 mils)
DS24B33S+T&R
+Denotes
a lead(Pb)-free/RoHS-compliant package.
T&R = Tape and reel.
1-Wire is a registered trademark of Maxim Integrated Products, Inc.
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1-Wire 4Kb EEPROM
DS24B33
ABSOLUTE MAXIMUM RATINGS
IO Voltage Range to GND ........................................-0.5V to +6V
IO Sink Current....................................................................20mA
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-55°C to +125°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow)
TO-92 ...........................................................................+250°C
SO ................................................................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(T
A
= -40°C to +85°C.) (Note 1)
PARAMETER
IO PIN: GENERAL DATA
1-Wire Pullup Voltage
1-Wire Pullup Resistance
Input Capacitance
Input Load Current
High-to-Low Switching Threshold
Input Low Voltage
Low-to-High Switching Threshold
Switching Hysteresis
Output Low Voltage
V
PUP
R
PUP
C
IO
I
L
V
TL
V
IL
V
TH
V
HY
V
OL
(Notes 2, 3)
(Notes 2, 4)
(Notes 5, 6)
IO at V
PUPMAX
(Notes 6, 7, 8)
(Notes 2, 9)
(Notes 6, 7, 10)
(Notes 6, 7, 11)
At 4mA (Note 12)
Standard speed
Overdrive speed
Recovery Time
(Notes 2, 13)
t
REC
V
PUP
+4.5V
640μs
Directly prior to reset pulse
Standard speed
Time-Slot Duration
(Notes 2, 14)
t
SLOT
Standard speed, V
PUP
Overdrive speed
+4.5V
+4.5V
5
2
1
5
10
65
61
8
7
480
480
48
15
2
60
8
60
6
960
640
80
60
6
240
24
75
10
μs
μs
μs
μs
μs
μs
1.0
0.2
0.05
0.5
2.8
0.3
2000
5
V
PUP
-
1.8
0.5
V
PUP
-
1.0
1.7
0.4
5.25
2.2
V
k
pF
μA
V
V
V
V
V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Directly prior to reset pulse
>
640μs
Overdrive speed, V
PUP
IO PIN: 1-Wire RESET, PRESENCE-DETECT CYCLE
Reset Low Time
(Note 2)
Presence-Detect High Time
Presence-Detect Low Time
Presence-Detect Sample Time
(Notes 2, 15)
t
RSTL
Standard speed, t
REC
before reset = 10μs
Standard speed, t
REC
before reset = 5μs
Overdrive speed
Standard speed
Overdrive speed
Standard speed
Overdrive speed
Standard speed
Overdrive speed
t
PDH
t
PDL
t
MSP
2
_______________________________________________________________________________________
1-Wire 4Kb EEPROM
ELECTRICAL CHARACTERISTICS (continued)
(T
A
= -40°C to +85°C.) (Note 1)
PARAMETER
IO PIN: 1-Wire WRITE
Write-Zero Low Time
(Notes 2, 16)
Write-One Low Time
(Notes 2, 16)
IO PIN: 1-Wire READ
Read Low Time
(Notes 2, 17)
Read Sample Time
(Notes 2, 17)
EEPROM
Programming Current
Programming Time
Write/Erase Cycles (Endurance)
(Notes 20, 21)
Data Retention (Notes 22, 23, 24)
I
PROG
t
PROG
N
CY
t
DR
(Note 18)
(Note 19)
At +25°C
At +85°C (worst case)
At +85°C (worst case)
200,000
50,000
40
2
5
mA
ms
—
Years
t
RL
t
MSR
Standard speed
Overdrive speed
Standard speed
Overdrive speed
5
1
t
RL
+
t
RL
+
15 -
2-
15
2
μs
μs
t
W0L
t
W1L
Standard speed
Overdrive speed
Standard speed
Overdrive speed
60
6
5
1
120
16
15
2
μs
μs
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DS24B33
Note 1:
Note 2:
Note 3:
Note 4:
Note 5:
Note 6:
Note 7:
Note 8:
Note 9:
Note 10:
Note 11:
Note 12:
Note 13:
Note 14:
Note 15:
Note 16:
Note 17:
Note 18:
Note 19:
Not all parameters are tested at all temperatures.
System requirement.
When operating near the minimum operating voltage (2.8V), a falling edge slew rate of 15V/µs or faster is recommended.
Maximum allowable pullup resistance is a function of the number of 1-Wire devices in the system, 1-Wire recovery times,
and current requirements during EEPROM programming. The specified value here applies to systems with only one
device and with the minimum 1-Wire recovery times. For more heavily loaded systems, an active pullup such as that found
in the DS2482-x00 or DS2480B may be required.
Capacitance on the data pin could be 2500pF when V
PUP
is first applied. If a 2.2kΩ resistor is used to pull up the data
line, then 15µs after V
PUP
has been applied, the parasite capacitance does not affect normal communications.
Guaranteed by design, characterization, and/or simulation only. Not production tested.
V
TL
, V
TH
, and V
HY
are a function of the internal supply voltage, which is a function of V
PUP
, R
PUP
, 1-Wire timing, and
capacitive loading on IO. Lower V
PUP
, higher R
PUP
, shorter t
REC
, and heavier capacitive loading all lead to lower values of
V
TL
, V
TH
, and V
HY
.
Voltage below which, during a falling edge on IO, a logic 0 is detected.
The voltage on IO must be less than or equal to V
ILMAX
at all times while the master is driving IO to a logic 0 level.
Voltage above which, during a rising edge on IO, a logic 1 is detected.
After V
TH
is crossed during a rising edge on IO, the voltage on IO must drop by at least V
HY
to be detected as logic 0.
The I-V characteristic is linear for voltages less than +1V.
Applies to a single DS24B33 attached to a 1-Wire line.
Defines maximum possible bit rate. Equal to 1/(t
W0LMIN
+ t
RECMIN
).
Interval after t
RSTL
during which a bus master is guaranteed to sample a logic 0 on IO if there is a DS24B33 present.
Minimum limit is t
PDHMAX
; maximum limit is t
PDHMIN
+ t
PDLMIN
.
ε
in Figure 11 represents the time required for the pullup circuitry to pull the voltage on IO up from V
IL
to V
TH
. The actual
maximum duration for the master to pull the line low is t
W1LMAX
+ t
F
-
ε
and t
W0LMAX
+ t
F
-
ε,
respectively.
δ
in Figure 11 represents the time required for the pullup circuitry to pull the voltage on IO up from V
IL
to the input high
threshold of the bus master. The actual maximum duration for the master to pull the line low is t
RLMAX
+ t
F
.
Current drawn from IO during the EEPROM programming interval. The pullup circuit on IO should be such that during the
programming interval, the voltage at IO is greater than or equal to V
PUPMIN
. If V
PUP
in the system is close to V
PUPMIN
, then
a low-impedance bypass of R
PUP
, which can be activated during programming, may need to be added.
The t
PROG
interval begins after the trailing rising edge on IO for the last time slot of the E/S byte for a valid copy scratch-
pad sequence. The interval ends once the device’s self-timed EEPROM programming cycle is complete and the current
drawn by the device has returned from I
PROG
to I
L
.
_______________________________________________________________________________________
3
1-Wire 4Kb EEPROM
DS24B33
ELECTRICAL CHARACTERISTICS (continued)
(T
A
= -40°C to +85°C.) (Note 1)
Note 20:
Note 21:
Note 22:
Note 23:
Write-cycle endurance is degraded as T
A
increases.
Not 100% production tested; guaranteed by reliability monitor sampling.
Data retention is degraded as T
A
increases.
Guaranteed by 100% production test at elevated temperature for a shorter time; equivalence of this production test to data
sheet limit at operating temperature range is established by reliability testing.
Note 24:
EEPROM writes can become nonfunctional after the data-retention time is exceeded. Long-time storage at elevated tem-
peratures is not recommended; the device can lose its write capability after 10 years at +125°C or 40 years at +85°C.
Pin Configurations
TOP VIEW
+
N.C.
1
8
N.C.
N.C.
2
DS24B33
7
N.C.
IO
3
6
N.C.
GND
4
5
N.C.
SO
(208 mils)
SIDE VIEW
GND
IO
N.C.
1
2
3
FRONT VIEW
1
2
3
TO-92
FRONT VIEW (T&R VERSION)
1
2
3
4
_______________________________________________________________________________________
1-Wire 4Kb EEPROM
Pin Description
TO-92
1
2
3
SO
4
3
1, 2, 5–8
NAME
GND
IO
N.C.
Ground Reference
1-Wire Bus Interface. Open-drain pin that requires external pullup resistor.
Not Connected
FUNCTION
DS24B33
Detailed Description
The DS24B33 combines 4Kb of data EEPROM with a
fully featured 1-Wire interface in a single chip. The
memory is organized as 16 pages of 256 bits each. A
volatile 256-bit memory page called the scratchpad
acts as a buffer when writing data to the EEPROM to
ensure data integrity. Data is first written to the scratch-
pad, from which it can be read back for verification
before transferring it to the EEPROM. The operation of
the DS24B33 is controlled over the single-conductor
1-Wire bus. Device communication follows the standard
1-Wire protocol. The energy required to read and write
the DS24B33 is derived entirely from the 1-Wire com-
munication line. Each DS24B33 has its own unalterable
and unique 64-bit registration number. The registration
number guarantees unique identification and is used to
address the device in a multidrop 1-Wire net environ-
ment. Multiple DS24B33 devices can reside on a com-
mon 1-Wire bus and be operated independently of
each other. Applications of the DS24B33 include cali-
bration data storage, PCB identification, and storage of
product revision status. The DS24B33 provides a high
degree of backward compatibility with the DS2433,
including having the same family code.
Overview
Figure 1 shows the relationships between the major
control and memory sections of the DS24B33. The
DS24B33 has four main data components: 64-bit
PARASITE POWER
1-Wire NET
1-Wire FUNCTION
CONTROL
64-BIT REGISTRATION
NUMBER
MEMORY
FUNCTION
CONTROL UNIT
DS24B33
CRC-16
GENERATOR
32-BYTE
SCRATCHPAD
DATA MEMORY
16 PAGES OF
32 BYTES EACH
Figure 1. Block Diagram
_______________________________________________________________________________________
5
京公网安备 11010802033920号
EEWORLD
